UJA1075TW/3V3 NXP [NXP Semiconductors], UJA1075TW/3V3 Datasheet - Page 21

• Manufacturer Part Number: UJA1075TW/3V3
• Description: High-speed CAN/LIN core system basis chip
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
UJA1075_2
Product data sheet
Figure 7
current of 250 mA with PDC = 0. Any additional load current requirement will be supplied
by the PNP transistor, up to its current limit. If the load current continues to rise, I
increase above the selected PDC threshold (to a maximum of 250 mA).
For a fast ramping load current, V1 will deliver the required load current (to a maximum of
250 mA) until the PNP transistor has switched on. Once the transistor has been activated,
V1 will deliver 85 mA (PDC = 0) with the transistor contributing the balance of the load
current (see
Fig 7.
Fig 8.
current
current
PNP
load
illustrates how V1 and the PNP transistor combine to supply a slow ramping load
PNP
current
V1 and PNP currents at a slow ramping load current of 250 mA (PDC = 0)
V1 and PNP currents at a fast ramping load current of 250 mA (PDC = 0)
I
V1
I
V1
load
current
I
(PDC = 0)
Figure
th(act)PNP
0 mA
I
(PDC = 0)
th(act)PNP
All information provided in this document is subject to legal disclaimers.
−165 mA
250 mA
250 mA
165 mA
8).
= 85 mA
= 85 mA
Rev. 02 — 27 May 2010
85 mA
250 mA
165 mA
High-speed CAN/LIN core system basis chip
I
(PDC = 0)
th(deact)PNP
= 50 mA
215 mA
UJA1075
© NXP B.V. 2010. All rights reserved.
015aaa075
015aaa111
50 mA
V1
21 of 53
will