UJA1075TW/3V3 NXP [NXP Semiconductors], UJA1075TW/3V3 Datasheet - Page 7
UJA1075TW/3V3
Manufacturer Part Number
UJA1075TW/3V3
Description
High-speed CAN/LIN core system basis chip
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.UJA1075TW3V3.pdf
(53 pages)
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NXP Semiconductors
UJA1075_2
Product data sheet
6.1.1 Introduction
6.1
The system controller manages register configuration and controls the internal functions
of the SBC. Detailed device status information is collected and presented to the
microcontroller. The system controller also provides the reset and interrupt signals.
The system controller is a state machine. The SBC operating modes, and how transitions
between modes are triggered, are illustrated in
more detail in the following sections.
System Controller
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 May 2010
High-speed CAN/LIN core system basis chip
Figure
3. These modes are discussed in
UJA1075
© NXP B.V. 2010. All rights reserved.
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