UJA1075TW/3V3 NXP [NXP Semiconductors], UJA1075TW/3V3 Datasheet - Page 41

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UJA1075TW/3V3

Manufacturer Part Number
UJA1075TW/3V3
Description
High-speed CAN/LIN core system basis chip
Manufacturer
NXP [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UJA1075TW/3V3/WD:1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 11.
T
are defined with respect to ground; positive currents flow in the IC; typical values are given at V
specified.
UJA1075_2
Product data sheet
Symbol
t
t
t
t
t
t
t
t
t
LIN transceiver; pins LIN, TXDL, RXDL
δ1
δ2
d(TXDCL-RXDCL)
d(TXDC-busdom)
d(TXDC-busrec)
d(busdom-RXDC)
d(busrec-RXDC)
wake(busdom)min
wake(busrec)min
to(wake)
to(dom)TXDC
vj
=
40 °C to +150
Dynamic characteristics
Parameter
delay time from TXDC LOW
to RXDC LOW
delay time from TXDC to
bus dominant
delay time from TXDC to
bus recessive
delay time from bus
dominant to RXDC
delay time from bus
recessive to RXDC
minimum bus dominant
wake-up time
minimum bus recessive
wake-up time
wake-up time-out time
TXDC dominant time-out
time
duty cycle 1
duty cycle 2
°
C; V
BAT
= 4.5 V to 28 V; V
…continued
All information provided in this document is subject to legal disclaimers.
BAT
between wake-up and confirm
V
V
Conditions
50 % V
V
R
C
f
V
R
C
V
R
C
V
R
C
C
V
R
C
C
first pulse (after first recessive) for
wake-up on pins CANH and CANL
Sleep mode
second pulse for wake-up on pins
CANH and CANL
first pulse for wake-up on pins CANH
and CANL; Sleep mode
second pulse (after first dominant) for
wake-up on pins CANH and CANL
messages; Sleep mode
CAN online; V
V
V
V
V
V
V
V
V
V
V
V
TXDC
V2
V2
V2
V2
V2
TXDC
th(rec)RX(max)
th(dom)RX(max)
BAT
th(rec)RX(max)
th(dom)RX(max)
BAT
th(rec)RX(min)
th(dom)RX(min)
BAT
th(rec)RX(min)
th(dom)RX(min)
BAT
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
RXDC
(CANH-CANL)
(CANH-CANL)
RXDC
> V
Rev. 02 — 27 May 2010
= 4.5 V to 5.5 V
= 4.5 V to 5. 5 V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
= 7 V to 18 V; LSC = 0
= 5.5 V to 7 V; LSC = 0
= 7.6 V to 18 V; LSC = 0
= 6.1 V to 7.6 V; LSC = 0
= 250 kHz
V1
= 0 V
= 15 pF
= 15 pF
TXDC
; V
BAT
to 50 % V
= 60 Ω
= 100 pF; C
= 60 Ω
= 100 pF
= 60 Ω
= 100 pF
= 60 Ω
= 100 pF
= 60 Ω
= 100 pF
= 0.422V
= 0.41V
= 0.744V
= 0.76V
V2
= 0.284V
= 0.275V
> V
= 0.581V
= 0.593V
= 4.5 V to 5.5 V
V2
; R
BAT
BAT
RXDC
BAT
LIN
BAT
High-speed CAN/LIN core system basis chip
BAT;
BAT
BAT
BAT
RXDC
= 500
; t
; t
; t
t
bit
bit
bit
bit
= 50 μs
= 15 pF
= 50 μs
= 50 μs
= 50 μs
Ω
; R
(CANH- CANL)
[1]
[2]
[1]
[2]
[2]
[3]
[2]
[3]
Min
60
-
-
-
-
0.5
0.5
0.5
0.5
0.4
1.8
0.396
0.396
-
-
BAT
= 45
= 14 V; unless otherwise
Ω
Typ
-
70
90
75
95
-
-
-
-
-
-
-
-
-
-
UJA1075
© NXP B.V. 2010. All rights reserved.
to 65
Max
235
-
-
-
-
3
3
3
3
1.2
4.5
-
-
0.581
0.581
Ω
; all voltages
41 of 53
Unit
ns
ns
ns
ns
ns
μs
μs
μs
μs
ms
ms

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