MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 103
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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7.4.1 Clock Enable Circuit
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
The clock enable circuit is used to enable the internal clock (ICLK) or
external clock (ECLK) and the port logic which is shared with the
oscillator pins (OSC1 and OSC2). The clock enable circuit generates an
ICG stop (ICGSTOP) signal which stops all clocks (ICLK, ECLK, and the
low-frequency base clock, IBASE). ICGSTOP is set and the ICG is
disabled in stop mode if the oscillator enable stop bit (OSCENINSTOP)
in the configuration (CONFIG) register or mask option register (MOR) is
clear. The ICG clocks will be enabled in stop mode if OSCENINSTOP is
high.
The internal clock enable signal (ICGEN) turns on the internal clock
generator which generates ICLK. ICGEN is set (active) whenever the
ICGON bit is set and the ICGSTOP signal is clear. When ICGEN is clear,
ICLK and IBASE are both low.
The external clock enable signal (ECGEN) turns on the external clock
generator which generates ECLK. ECGEN is set (active) whenever the
ECGON bit is set and the ICGSTOP signal is clear. ECGON cannot be
set unless the external clock enable (EXTCLKEN) bit in the CONFIG or
MOR is set. when ECGEN is clear, ECLK is low.
The port B6 enable signal (PB6EN) turns on the port B6 logic. Since port
B6 is on the same pin as OSC1, this signal is only active (set) when the
external clock function is not desired. Therefore, PB6EN is clear when
ECGON is set. PB6EN is not gated with ICGSTOP, which means that if
the ECGON bit is set, the port B6 logic will remain disabled in stop mode.
The port B7 enable signal (PB7EN) turns on the port B7 logic. Since port
B7 is on the same pin as OSC2, this signal is only active (set) when 2-
pin oscillator function is not desired. Therefore, PB7EN is clear when
ECGON and the external crystal enable (EXTXTALEN) bit in the
CONFIG or MOR are both set. PB6EN is not gated with ICGSTOP,
which means that if ECGON and EXTXTALEN are set, the port B7 logic
will remain disabled in stop mode.
Internal Clock Generator Module (ICG)
Internal Clock Generator Module (ICG)
Functional Description
Technical Data
103
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