MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 243
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
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16.8.5 TIM Channel Registers
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Register name and address:
Register name and address:
Register name and address:
Register name and address:
These read/write registers (TCH0H/L and TCH1H/L) contain the
captured TIM counter value of the input capture function or the output
compare value of the output compare function. The state of the TIM
channel registers after reset is unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the
TIM channel x registers (TCHxH) inhibits input captures until the low
byte (TCHxL) is read.
In output compare mode (MSxB:MSxA 0:0), writing to the high byte of
the TIM channel x registers (TCHxH) inhibits output compares until the
low byte (TCHxL) is written.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 16-9. TIM Channel Registers (TCH0H/L and TCH1H/L)
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Timer Interface Module (TIM)
14
14
6
6
6
6
6
6
TCH0H — $0026
TCH0L — $0027
TCH1H — $0029
TCH1L — $002A
13
13
5
5
5
5
5
5
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
12
12
4
4
4
4
4
4
11
11
3
3
3
3
3
3
Timer Interface Module (TIM)
10
10
2
2
2
2
2
2
1
9
1
1
1
9
1
1
Technical Data
I/O Registers
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
243
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