MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 242
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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Timer Interface Module (TIM)
Technical Data
242
NOTE:
NOTE:
TOVx — Toggle On Overflow Bit
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
The PWM 0 percent duty cycle is defined as output low all of the time.
To generate the 0 percent duty cycle, select clear output on compare
and then clear the TOVx bit (CHxMAX = 0). The PWM 100 percent duty
cycle is defined as output high all of the time. To generate the 100
percent duty cycle, use the CHxMAX bit in the TSCx register.
PT
CHxMAX
A
When channel x is an output compare channel, this read/write bit
controls the behavior of the channel x output when the TIM counter
overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
When the TOVx bit is at logic 1 and clear output on compare is
selected, setting the CHxMAX bit forces the duty cycle of buffered and
unbuffered PWM signals to 100 percent. As
CHxMAX bit takes effect in the cycle after it is set or cleared. The
output stays at 100 percent duty cycle level until the cycle after
CHxMAX is cleared.
x/TCH
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
OVERFLOW
Timer Interface Module (TIM)
COMPARE
PERIOD
OUTPUT
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
Figure 16-8. CHxMAX Latency
OVERFLOW
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
Figure 16-8
OVERFLOW
COMPARE
OUTPUT
shows, the
OVERFLOW
MOTOROLA
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