MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 39

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
2.3 I/O Registers
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Addr.
$0000
$0001
$0002
Register Name
Port A Data Register
Port B Data Register
Unimplemented
See page 151.
See page 155.
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 7)
(PTA)
(PTB)
Most of the control, status, and data registers are in the zero-page area
of $0000–$003F. Additional input/output (I/O) registers have the
following addresses:
A summary of the registers available on the MC68HC908KX8 is
provided in
Reset:
Reset:
Read:
Read:
Write:
Write:
$FE01 — SIM reset status register, SRSR
$FE04 — Interrupt status register 1, INT1
$FE05 — Interrupt status register 2, INT2
$FE06 — Interrupt status register 3, INT3
$FE08 — FLASH control register, FLCR
$FE09 — Break address register high, BRKH
$FE0A — Break address register low, BRKL
$FE0B — Break status and control register, BRKSCR
$FE0C — LVI status register, LVISR
$FF7E — FLASH block protect register, FLBPR
$FFFF — COP control register, COPCTL
Bit 7
PTB7
0
Figure
= Unimplemented
in non-volatile FLASH memory
PTB6
6
0
Memory Map
2-2.
Table 2-1
PTB5
5
0
Unaffected by reset
Unaffected by reset
PTA4
PTB4
4
R
is a list of vector locations.
= Reserved
PTA3
PTB3
3
PTA2
PTB2
2
U = Unaffected
PTA1
PTB1
1
Technical Data
Memory Map
I/O Registers
Bit 0
PTA0
PTB0
39

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