MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 220

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Timebase Module (TBM)
15.8 Timebase Control Register
Technical Data
220
NOTE:
Address: $001C
The timebase has one register, the timebase control register (TBCR),
which is used to enable the timebase interrupts and set the rate.
TBIF — Timebase Interrupt Flag
TBR2–TBR0 — Timebase Divider Selection Bits
Do not change TBR2–TBR0 bits while the timebase is enabled
(TBON = 1).
TACK— Timebase ACKnowledge Bit
TBIE — Timebase Interrupt Enabled Bit
Reset:
Read:
Write:
This read-only flag bit is set when the timebase counter has rolled
over.
These read/write bits select the tap in the counter to be used for
timebase interrupts as shown in
The TACK bit is a write-only bit and always reads as 0. Writing a
logic 1 to this bit clears TBIF, the timebase interrupt flag bit. Writing a
logic 0 to this bit has no effect.
This read/write bit enables the timebase interrupt when the TBIF bit
becomes set. Reset clears the TBIE bit.
1 = Timebase interrupt pending
0 = Timebase interrupt not pending
1 = Clear timebase interrupt flag
0 = No effect
1 = Timebase interrupt is enabled.
0 = Timebase interrupt is disabled.
Bit 7
TBIF
0
Figure 15-2. Timebase Control Register (TBCR)
Timebase Module (TBM)
= Unimplemented
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
TBR2
6
0
TBR1
5
0
TBR0
4
0
Table
TACK
15-1.
R
3
0
0
= Reserved
TBIE
2
0
TBON
1
0
MOTOROLA
Bit 0
R
0

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