MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 152

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Input/Output (I/O) Ports
10.3.2 Data Direction Register A
Technical Data
152
NOTE:
Address: $0004
Data direction register A (DDRA) determines whether each port A pin is
an input or an output. Writing a logic 1 to a DDRA bit enables the output
buffer for the corresponding port A pin; a logic 0 disables the output
buffer.
DDRA4–DDRA0 — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 10-4
Reset:
Read:
Write:
These read/write bits control port A data direction. Reset clears
DDRA4–DDRA0, configuring all port A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Bit 7
0
0
Figure 10-3. Data Direction Register A (DDRA)
shows the port A I/O logic.
Input/Output (I/O) Ports
= Unimplemented
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
6
0
0
5
0
0
DDRA4
4
0
DDRA3
3
0
DDRA2
2
0
DDRA1
1
0
MOTOROLA
DDRA0
Bit 0
0

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