MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 251

• Manufacturer Part Number: MC68HC908KX2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

17.8.1 ADC Status and Control Register
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
NOTE:
Address:
The following paragraphs describe the function of the ADC status and
control register (ADSCR).
COCO — Conversions Complete Bit
Because the MC68HC908KX8 does not have a DMA module, the COCO
bit should not be set while interrupts are enabled (AIEN = 1).
AIEN — ADC Interrupt Enable Bit
Reset:
Read:
Write:
When the AIEN bit is a logic 0, the COCO is a read-only bit which is
set each time a conversion is completed. This bit is cleared whenever
the ADC status and control register is written or whenever the ADC
data register is read.
When the AIEN bit is a logic 1, the ADC module is capable of
generating a CPU interrupt after each ADC conversion. A CPU
interrupt is generated if the COCO bit (ADC status control register,
$003C) is at logic 0. If the COCO bit is at logic 1, a DMA interrupt is
generated. Reset clears this bit.
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the ADR register is
read or the ADSCR register is written. Reset clears the AIEN bit.
Figure 17-2. ADC Status and Control Register (ADSCR)
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
$003C
COCO
Bit 7
or CPU interrupts enabled (AIEN = 1)
Analog-to-Digital Converter (ADC)
R
R
0
= Reserved
AIEN
6
0
ADCO
5
0
ADCH4
4
1
ADCH3
3
1
Analog-to-Digital Converter (ADC)
ADCH2
2
1
ADCH1
1
1
Technical Data
I/O Registers
ADCH0
Bit 0
1
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