MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 235
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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16.8.1 TIM Status and Control Register
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Address: $0020
The TIM status and control register (TSC):
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
Reset:
Read:
Write:
•
•
•
•
•
This read/write flag is set when the TIM counter reaches the modulo
value programmed in the TIM counter modulo registers. Clear TOF by
reading the TIM status and control register when TOF is set and then
writing a logic 0 to TOF. If another TIM overflow occurs before the
clearing sequence is complete, then writing logic 0 to TOF has no
effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic
1 to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
1 = TIM counter has reached modulo value.
0 = TIM counter has not reached modulo value.
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Figure 16-4. TIM Status and Control Register (TSC)
Bit 7
TOF
0
0
Timer Interface Module (TIM)
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
Timer Interface Module (TIM)
PS2
2
0
PS1
1
0
Technical Data
I/O Registers
Bit 0
PS0
0
235
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