MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 83
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
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6.4.1 Active Resets from Internal Sources
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
NOTE:
An internal reset can be caused by an illegal address, illegal opcode,
COP timeout, LVI, POR, or MENRST as shown in
For LVI or POR resets, the SIM cycles through 4096 CGMXCLK cycles
during which the SIM asserts IRST. The internal reset signal then follows
with the 64-cycle phase as shown in
The COP reset is asynchronous to the bus clock.
CGMXCLK
IRST
IAB
System Integration Module (SIM)
Figure 6-4. Sources of Internal Reset
ILLEGAL ADDRESS RST
Figure 6-5. Internal Reset Timing
ILLEGAL OPCODE RST
COPRST
MENRST
POR
LVI
64 CYCLES
Figure
INTERNAL RESET
System Integration Module (SIM)
6-5.
Reset and System Initialization
Figure
VECTOR HIGH
6-4.
Technical Data
83
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