MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 129

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
7.8 Input/Output (I/O) Registers
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
*See
$003A
$0036
$0037
$0038
$0039
Addr.
7.8.1 ICG Control Register
ICG DCO Stage Control
ICG Multiply Register
Register Name
ICG Control Register
ICG Divider Control
Register (ICGDVR)
Register (ICGDSR)
ICG Trim Register
See page 131.
See page 133.
See page 134.
See page 134.
See page 135.
(ICGMR)
(ICGCR)
(ICGTR)
Figure 7-10. ICG Module I/O Register Summary
for method of clearing the CMF bit.
The ICG contains five registers, summarized in
registers are:
Several of the bits in these registers have interaction where the state of
one bit may force another bit to a particular state or prevent another bit
from being set or cleared. A summary of this interaction is shown in
Table
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read: DSTG7
Write:
Write:
Write:
Write:
Write:
1. ICG control register (ICGCR)
2. ICG multiplier register (ICGMR)
3. ICG trim register (ICGTR)
4. ICG DCO divider control register (ICGDVR)
5. ICG DCO stage control register (ICGDSR)
7-4.
Internal Clock Generator Module (ICG)
TRIM7
CMIE
Bit 7
R
U
0
0
1
0
= Unimplemented
DSTG6
TRIM6
CMF
N6
0*
6
0
0
0
0
R
U
DSTG5
CMON
TRIM5
N5
R
U
5
0
0
0
0
DSTG4
TRIM4
CS
N4
R
U
R
4
0
1
0
0
Internal Clock Generator Module (ICG)
= Reserved
ICGON
DSTG3
TRIM3
DDIV3
N3
U
R
U
3
1
0
0
Figure
Input/Output (I/O) Registers
DSTG2
TRIM2
DDIV2
ICGS
N2
U
R
U
2
0
1
0
7-10. These
U = Unaffected
ECGON
DSTG1
TRIM1
DDIV1
N1
U
R
U
1
0
0
0
Technical Data
DSTG0
TRIM0
DDIV0
ECGS
Bit 0
N0
U
R
U
0
1
0
129

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