SPEAR-09-H022_06 STMICROELECTRONICS [STMicroelectronics], SPEAR-09-H022_06 Datasheet - Page 50

• Manufacturer Part Number: SPEAR-09-H022_06
• Description: SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Ethernet MAC 110
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Ethernet MAC 110
Overview
The Ethernet MAC controller is compliant with IEEE 802.3 specifications and provides the
following features:
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The Ethernet MAC Controller is composed of two blocks:
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Figure 14. Ethernet MAC Controller block diagram
Built-in DMA engine to manage Memory transfers
Collision Detection in Half Duplex mode (CSMA/CD)
Control Frames support in Full Duplex mode (IEEE 802.3)
IEEE 802.3 Media Independent Interface (MII), Reduced Media Independent Interface
(RMII) and General Purpose Serial Interface (GPSI)
the DMA_MAC controller, which provides DMA facilities on top of the MAC110 block.
It is able to support two types of operations:
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–
the MAC110 IP block: it implements the LAN CSMA/CD sublayer for the following
families of systems: 10 Mb/s and 100 Mb/s of data rates for baseband and broadband
systems
connected to
AHB Master
AHB Slave
MPMC
write_type RX: data are moved from the MAC110 to a memory destination on the
AMBA bus
read_type TX: data are moved from a memory source on the AMBA bus to the
MAC110
Conguration register array
RX DMA
DMA_MAC
Local FIFO
TX DMA
DATA
Configuration
MAC110
MIM
MII
I/F
SPEAR-09-H022
PHY