SPEAR-09-H022_06 STMICROELECTRONICS [STMicroelectronics], SPEAR-09-H022_06 Datasheet - Page 52
SPEAR-09-H022_06
Manufacturer Part Number
SPEAR-09-H022_06
Description
SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.SPEAR-09-H022_06.pdf
(71 pages)
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USB 2.0 Device
16
16.1
16.1.1
16.1.2
16.1.3
16.1.4
52/71
USB 2.0 Device
Overview
The USB 2.0 Device is constituted with 4 main blocks:
●
●
●
●
USB2.0PHY
The USB2.0PHY is a hard macro that can reach the max speed HS of USB: 480 Mbits/Sec.
UDC
The UDC is able to detect the USB connection speed via UTMI+ interface.
There is an AHB master and two slaves.
The UDC contains 6 endpoints (0 control, 1 Bulk IN, 2 Bulk OUT, 3 ISO IN, 4 ISO OUT, 5
Interrupt IN)
The UDC contains 4 configurations.
DMA
Provided with a master interface on the AHB Bus, it manage data transfer between Device
Controller CRSs and the FIFO embedded in the block.
USB plug detect
The Plug Detect detects when the Device is connected to an Host and is receiving the
VBUS signal.
USB2.0PHY that executes the serialization and the de-serialization and implements the
transceiver for the USB line
UDC, the USB 2.0 Device Controller. It is connected on AHB Bus and generates the
commands for USB2.0PHY in UTMI+ interface
a dedicated DMA macro to transfer data between the Device Controller and Multi-Port
Memory Controller
USB Plug Detect, which detects the connection of the device
SPEAR-09-H022
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