HD6412350 Hitachi, HD6412350 Datasheet - Page 181

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HD6412350

Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet

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6.5.4
If the bit in ABWCR corresponding to an area designated as DRAM space is set to 1, that area is
designated as 8-bit DRAM space; if the bit is cleared to 0, the area is designated as 16-bit DRAM
space. In 16-bit DRAM space, 16-bit configuration DRAM can be connected directly.
In 8-bit DRAM space the upper half of the data bus, D
space both the upper and lower halves of the data bus, D
Access sizes and data alignment are the same as for the basic bus interface: see section 6.4.2, Data
Size and Data Alignment.
6.5.5
Table 6-7 shows the pins used for DRAM interfacing and their functions.
Table 6-7
Pin
HWR
LCAS
CS2
CS3
CS4
CS5
CAS
WAIT
A
D
12
15
to A
to D
0
0
Data Bus
Pins Used for DRAM Interface
With DRAM
Setting
WE
LCAS
RAS2
RAS3
RAS4
RAS5
UCAS
WAIT
A
D
DRAM Interface Pins
12
15
to A
to D
0
0
Name
Write enable
Lower column address strobe Output Lower column address strobe
Row address strobe 2
Row address strobe 3
Row address strobe 4
Row address strobe 5
Upper column address strobe Output Upper column address strobe
Wait
Address pins
Data pins
15
15
to D
to D
I/O
Output When 2-CAS system is set,
Output Row address strobe when
Output Row address strobe when
Output Row address strobe when
Output Row address strobe when
Input
Output Row address/column address
I/O
8
, is enabled, while in 16-bit DRAM
0
, are enabled.
Function
write enable for DRAM space
access.
for 16-bit DRAM space access
area 2 is designated as DRAM
space.
area 3 is designated as DRAM
space.
area 4 is designated as DRAM
space.
area 5 is designated as DRAM
space.
for DRAM space access
Wait request signal
multiplexed output
Data input/output pins
161

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