HD6412350 Hitachi, HD6412350 Datasheet - Page 538

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

12.2
12.2.1
TCNT is an 8-bit readable/writable* up-counter.
When the TME bit is set to 1 in TCSR, TCNT starts counting pulses generated from the internal
clock source selected by bits CKS2 to CKS0 in TCSR. When the count overflows (changes from
H'FF to H'00), either the watchdog timer overflow signal (WDTOVF) or an interval timer
interrupt (WOVI) is generated, depending on the mode selected by the WT/IT bit in TCSR.
TCNT is initialized to H'00 by a reset, in hardware standby mode, or when the TME bit is cleared
to 0. It is not initialized in software standby mode.
Note: * TCNT is write-protected by a password to prevent accidental overwriting. For details see
12.2.2
TCSR is an 8-bit readable/writable* register. Its functions include selecting the clock source to be
input to TCNT, and the timer mode.
TCR is initialized to H'18 by a reset and in hardware standby mode. It is not initialized in software
standby mode.
Note: * TCSR is write-protected by a password to prevent accidental overwriting. For details see
518
Bit
Initial value
R/W
Bit
Initial value
R/W
Note: * Can only be written with 0 for flag clearing.
section 12.2.4, Notes on Register Access.
section 12.2.4, Notes on Register Access.
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
:
:
:
:
:
:
R/(W)*
OVF
R/W
7
0
7
0
WT/IT
R/W
R/W
6
0
6
0
TME
R/W
R/W
5
0
5
0
R/W
—
—
4
0
4
1
R/W
—
—
3
0
3
1
CKS2
R/W
R/W
2
0
2
0
CKS1
R/W
R/W
1
0
1
0
CKS0
R/W
R/W
0
0
0
0