HD6412350 Hitachi, HD6412350 Datasheet - Page 291

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

When the write data buffer function is activated, the DMAC recognizes that the bus cycle
concerned has ended, and starts the next operation. Therefore, DREQ pin sampling is started one
state after the start of the DMA write cycle or single address transfer.
7.5.13
The DMAC channel priority order is: channel 0 > channel 1, and channel A > channel B. Table 7-
13 summarizes the priority order for DMAC channels.
Table 7-13 DMAC Channel Priority Order
Short Address Mode
Channel 0A
Channel 0B
Channel 1A
Channel 1B
Figure 7-34 Example of Single Address Transfer Using Write Data Buffer Function
Internal read signal
External address
Internal address
DMAC Multi-Channel Operation
DACK
RD
ø
DMA
read
Full Address Mode
Channel 0
Channel 1
DMA
single
CPU
read
DMA
single
Priority
High
Low
CPU
read
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