HD6412350 Hitachi, HD6412350 Datasheet - Page 292

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

If transfer requests are issued simultaneously for more than one channel, or if a transfer request for
another channel is issued during a transfer, when the bus is released the DMAC selects the
highest-priority channel from among those issuing a request according to the priority order shown
in table 7-13.
During burst transfer, or when one block is being transferred in block transfer, the channel will not
be changed until the end of the transfer.
Figure 7-35 shows a transfer example in which transfer requests are issued simultaneously for
channels 0A, 0B, and 1.
272
Address bus
DMA control
Channel 0A
Channel 0B
Channel 1
HWR
LWR
RD
ø
release
Idle
Bus
Request clear
Read
DMA read
Request
hold
Request
hold
Figure 7-35 Example of Multi-Channel Transfer
Write
Channel 0A
transfer
Selection
DMA write
selection
Non-
Idle
release
Request clear
Bus
Read
DMA read
Request
hold
Write
Channel 0B
transfer
Selection
DMA write
Idle
release
Request clear
Bus
Read
DMA read
Channel 1 transfer
Write
DMA write
Read
DMA
read