HD6432646 Hitachi, HD6432646 Datasheet - Page 1051

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

TCR1—Timer Control Register 1
Note:
Bit
Initial value
Read/Write
Bit 7 is reserved in channel 1.
It is always read as 0 and cannot be modified.
Counter Clear
Note: * Synchronous operation setting is performed by setting the
0
1
0
1
0
1
—
—
7
0
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation*
SYNC bit in TSYR to 1.
CCLR1
R/W
6
0
Note: Internal clock edge selection is valid when the input
Clock Edge
0
1
—
0
1
CCLR0
clock is ø/4 or slower. This setting is ignored if the
input clock is ø/1, or when overflow/underflow of
another channel is selected.
R/W
Count at rising edge
Count at falling edge
Count at both edges
5
0
Note: This setting is ignored when channel 1 is in phase
Time Prescaler
0
1
CKEG1
0
1
0
1
R/W
counting mode.
4
0
0
1
0
1
0
1
0
1
Internal clock: counts on ø/1
Internal clock: counts on ø/4
Internal clock: counts on ø/16
Internal clock: counts on ø/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Internal clock: counts on ø/256
Counts on TCNT2 overflow/underflow
CKEG0
H'FF20
R/W
3
0
TPSC2
R/W
2
0
TPSC1
R/W
1
0
TPSC0
R/W
0
0
TPU1
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