HD6432646 Hitachi, HD6432646 Datasheet - Page 555

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

(1) Data write
(2) Transfer from
(3) Serial data output
Note: When the ERS flag is set, it should be cleared until transfer of the last bit (D7 in LSB-first
In case of normal transmission: TEND flag is set
In case of transmit error:
TDR to TSR
I/O data
TXI
(TEND interrupt)
Legend
Ds
D0 to D7 : Data bits
Dp
DE
Note : etu : Elementary time unit (time for fransfer of 1 bit)
When GM = 0
When GM = 1
transmission, D0 in MSB-first transmission) of the next transfer data to be transmitted has
been completed.
Figure 14-5 Relation Between Transmit Operation and Internal Registers
Figure 14-6 TEND Flag Generation Timing in Transmission Operation
: Start bit
: Parity bit
: Error signal
Ds
Data 1
Data 1
Data 1
TDR
D0 D1 D2 D3 D4 D5 D6 D7 Dp
ERS flag is set
Steps (2) and (3) above are repeated until the TEND flag is set
(shift register)
11.0 etu
Data 1
TSR
12.5 etu
; Data remains in TDR
Data 1
I/O signal line output
Guard
time
DE
521