HD6432646 Hitachi, HD6432646 Datasheet - Page 73

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Bits 2 to 0—Interrupt Mask Bits (I2 to I0): These bits designate the interrupt mask level (0 to
7). For details, refer to section 5, Interrupt Controller.
Operations can be performed on the EXR bits by the LDC, STC, ANDC, ORC, and XORC
instructions. All interrupts, including NMI, are disabled for three states after one of these
instructions is executed, except for STC.
(3) Condition-Code Register (CCR): This 8-bit register contains internal CPU status
information, including an interrupt mask bit (I) and half-carry (H), negative (N), zero (Z),
overflow (V), and carry (C) flags.
Bit 7—Interrupt Mask Bit (I): Masks interrupts other than NMI when set to 1. (NMI is accepted
regardless of the I bit setting.) The I bit is set to 1 by hardware at the start of an exception-
handling sequence. For details, refer to section 5, Interrupt Controller.
Bit 6—User Bit or Interrupt Mask Bit (UI): Can be written and read by software using the
LDC, STC, ANDC, ORC, and XORC instructions. This bit can also be used as an interrupt mask
bit. For details, refer to section 5, Interrupt Controller.
Bit 5—Half-Carry Flag (H): When the ADD.B, ADDX.B, SUB.B, SUBX.B, CMP.B, or NEG.B
instruction is executed, this flag is set to 1 if there is a carry or borrow at bit 3, and cleared to 0
otherwise. When the ADD.W, SUB.W, CMP.W, or NEG.W instruction is executed, the H flag is
set to 1 if there is a carry or borrow at bit 11, and cleared to 0 otherwise. When the ADD.L,
SUB.L, CMP.L, or NEG.L instruction is executed, the H flag is set to 1 if there is a carry or
borrow at bit 27, and cleared to 0 otherwise.
Bit 4—User Bit (U): Can be written and read by software using the LDC, STC, ANDC, ORC, and
XORC instructions.
Bit 3—Negative Flag (N): Stores the value of the most significant bit (sign bit) of data.
Bit 2—Zero Flag (Z): Set to 1 to indicate zero data, and cleared to 0 to indicate non-zero data.
Bit 1—Overflow Flag (V): Set to 1 when an arithmetic overflow occurs, and cleared to 0 at other
times.
Bit 0—Carry Flag (C): Set to 1 when a carry occurs, and cleared to 0 otherwise. Used by:
The carry flag is also used as a bit accumulator by bit manipulation instructions.
Add instructions, to indicate a carry
Subtract instructions, to indicate a borrow
Shift and rotate instructions, to store the value shifted out of the end bit
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