HD6432646 Hitachi, HD6432646 Datasheet - Page 619

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

15.4
A bus transceiver IC is necessary to connect the H8S/2646 Series chip to a CAN bus. A Philips
PCA82C250 transceiver IC, or compatible device, is recommended. Figure 15-14 shows a sample
connection diagram.
15.5
1. Reset
2. HCAN sleep mode
3. Interrupts
The HCAN is reset by a reset, and in hardware standby mode and software standby mode. All
the registers are initialized in a reset, but mailboxes (message control (MCx[x])/message data
(MDx[x]) are not. However, after powering on, mailboxes (message control (MCx[x])/message
data (MDx[x]) are initialized, and their values are undefined. Therefore, mailbox initialization
must always be carried out after a reset or a transition to hardware standby mode or software
standby mode. The reset interrupt flag (IRR0) is always set after a reset or recovery from
software standby mode. This bit cannot be masked by the interrupt mask register (IMR). When
a flag is not cleared and the interrupt controller enables HCAN interrupts, the HCAN interrupts
the CPU. Clear IRR0 during initialization.
The bus operation interrupt flag (IRR12) in the interrupt register (IRR) is set by bus operation
in HCAN sleep mode. Therefore, this flag is not used by the HCAN to indicate sleep mode
release. Also note that the reset status bit (GSR3) in the general status register (GSR) is set in
sleep mode.
When the mailbox interrupt mask register (MBIMR) is set, the interrupt register (IRR8,2,1) is
H8S/2646 Series
CAN Bus Interface
Usage Notes
HRxD
HTxD
Figure 15-14 High-Speed Interface Using PCA82C250
No connection
PCA82C250
RS
RxD
TxD
Vref
CANH
CANL
GND
Vcc
Vcc
124
124
CAN bus
585