HD6432646 Hitachi, HD6432646 Datasheet - Page 291
HD6432646
Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432646.pdf
(1155 pages)
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Port A Data Register (PADR)
PADR is an 8-bit readable/writable register that stores output data for the port A pins (PA7 to
PA0).
PADR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port A Register (PORTA)
Note: * Determined by state of pins PA7 to PA0.
PORTA is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port A pins (PA7 to PA0) must always be performed on PADR.
Reading a pin being used as an LCD driver returns an undefined value.
If a port A read is performed while PADDR bits are set to 1, the PADR values are read. If a port A
read is performed while PADDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTA contents are determined by the pin states, as
PADDR and PADR are initialized. PORTA retains its prior state in software standby mode.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
PA7DR
R/W
PA7
—*
7
0
7
R
PA6DR
R/W
PA6
—*
6
0
6
R
PA5DR
R/W
PA5
—*
5
0
5
R
PA4DR
R/W
PA4
—*
4
0
4
R
PA3DR
R/W
PA3
—*
3
0
3
R
PA2DR
R/W
PA2
—*
2
0
2
R
PA1DR
R/W
PA1
—*
1
0
1
R
PA0DR
R/W
PA0
—*
0
0
0
R
257
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