HD6432646 Hitachi, HD6432646 Datasheet - Page 705

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Table 20-3 Flash Memory Erase Blocks
Block (Size)
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
EB8 (32 kbytes)
EB9 (32 kbytes)
20.5.5
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
real-time flash memory programming. RAMER initialized to H'00 by a reset and in hardware
standby mode. It is not initialized by software standby mode. RAMER settings should be made in
user mode or user program mode.
Flash memory area divisions are shown in table 20-4. To ensure correct operation of the emulation
function, the ROM for which RAM emulation is performed should not be accessed immediately
after this register has been modified. Normal execution of an access immediately after register
modification is not guaranteed.
Bits 7 and 6—Reserved: These bits always read 0.
Bits 5 and 4—Reserved: Only 0 may be written to these bits.
Initial value:
RAM Emulation Register (RAMER)
R/W:
Bit:
—
7
0
R
—
6
0
R
Addresses
H'000000–H'0003FF
H'000400–H'0007FF
H'000800–H'000BFF
H'000C00–H'000FFF
H'001000–H'007FFF
H'008000–H'00BFFF
H'00C000–H'00DFFF
H'00E000–H'00FFFF
H'010000–H'017FFF
H'018000–H'01FFFF
R/W
—
5
0
R/W
—
4
0
RAMS
R/W
3
0
RAM2
R/W
2
0
RAM1
R/W
1
0
RAM0
R/W
0
0
671