HD6432646 Hitachi, HD6432646 Datasheet - Page 483

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

13.2.8
BRR is an 8-bit register that sets the serial transmit/receive bit rate in accordance with the baud
rate generator operating clock selected by bits CKS1 and CKS0 in SMR.
BRR can be read or written to by the CPU at all times.
BRR is initialized to H'FF by a reset and in standby mode.
As baud rate generator control is performed independently for each channel, different values can
be set for each channel.
Table 13-3 shows sample BRR settings in asynchronous mode, and table 13-4 shows sample BRR
settings in clocked synchronous mode.
Table 13-3 BRR Settings for Various Bit Rates (Asynchronous Mode)
Bit Rate
(bit/s)
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
Bit
Initial value
R/W
Bit Rate Register (BRR)
:
:
:
n
2
1
1
0
0
0
0
0
—
0
—
R/W
ø = 4 MHz
N
70
207
103
207
103
51
25
12
—
3
—
7
1
Error
(%)
0.03
0.16
0.16
0.16
0.16
0.16
0.16
0.16
—
0.00
—
R/W
6
1
n
2
1
1
0
0
0
0
0
0
0
0
ø = 4.9152 MHz
R/W
5
1
N
86
255
127
255
127
63
31
15
7
4
3
Error
(%)
0.31
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
–1.70 0
0.00
R/W
4
1
n
2
2
1
1
0
0
0
0
0
0
R/W
3
1
ø = 5 MHz
N
88
64
129
64
129
64
32
15
7
4
3
R/W
Error
(%)
–0.25 2
0.16
0.16
0.16
0.16
0.16
–1.36 0
1.73
1.73
0.00
1.73
2
1
n
2
1
1
0
0
0
0
0
0
R/W
1
1
ø = 6 MHz
N
106
77
155
77
155
77
38
19
9
5
4
R/W
Error
(%)
–0.44
0.16
0.16
0.16
0.16
0.16
0.16
–2.34
–2.34
0.00
–2.34
0
1
449