MC9328MX1/D ETC, MC9328MX1/D Datasheet - Page 63

• Manufacturer Part Number: MC9328MX1/D
• Description: i.MX Integrated Portable System Processor
• Manufacturer: ETC

Freescale Semiconductor
Note:
Symbol
T10
T10
T1
T2
T3
T4
T5
T6
T7
T8
T9
T9
•
•
•
•
•
•
Ts is the SCLK period which equals LCDC_CLK / (PCD + 1). Normally LCDC_CLK = 15ns.
VSYN, HSYN and OE can be programmed as active high or active low. In Figure 46, all 3 signals are active low.
The polarity of SCLK and LD[15:0] can also be programmed.
SCLK can be programmed to be deactivated during the VSYN pulse or the OE deasserted period. In Figure 46, SCLK is
always active.
For T9 non-display region, VSYN is non-active. It is used as an reference.
XMAX is defined in pixels.
End of OE to beginning of VSYN
HSYN period
VSYN pulse width
End of VSYN to beginning of OE
HSYN pulse width
End of HSYN to beginning to T9
End of OE to beginning of HSYN
SCLK to valid LD data
End of HSYN idle2 to VSYN edge
(for non-display region)
End of HSYN idle2 to VSYN edge
(for Display region)
VSYN to OE active (Sharp = 0),
when VWAIT2 = 0
VSYN to OE active (Sharp = 1),
when VWAIT2 = 0
Table 28. 4/8/16 Bit/Pixel TFT Color Mode Panel Timing Table
Description
MC9328MX1 Advance Information, Rev. 4
Minimum
XMAX+5
+T7+T9
T5+T6
T2
-3
2
1
1
1
2
1
1
2
Corresponding Register Value
(VWAIT1·T2)+T5+T6+T7+T9
XMAX+T5+T6+T7+T9+T10
VWIDTH·(T2)
VWAIT2·(T2)
HWIDTH+1
HWAIT2+1
HWAIT1+1
2
1
1
2
3
Specifications
Unit
Ts
Ts
Ts
Ts
Ts
Ts
Ts
ns
Ts
Ts
Ts
Ts
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