MC9328MX1/D ETC, MC9328MX1/D Datasheet - Page 7

• Manufacturer Part Number: MC9328MX1/D
• Description: i.MX Integrated Portable System Processor
• Manufacturer: ETC

Freescale Semiconductor
DQM [3:0]
CSD0
CSD1
RAS
CAS
SDWE
SDCKE0
SDCKE1
SDCLK
RESET_SF
EXTAL16M
XTAL16M
EXTAL32K
XTAL32K
CLKO
RESET_IN
RESET_OUT
POR
TRST
TDO
TDI
Signal Name
SDRAM data enable
SDRAM/SyncFlash Chip Select signal which is multiplexed with the CS2 signal. These two signals
are selectable by programming the system control register.
SDRAM/SyncFlash Chip Select signal which is multiplex with CS3 signal. These two signals are
selectable by programming the system control register. By default, CSD1 is selected, so it can be
used as SyncFlash boot chip select by properly configuring BOOT [3:0] input pins.
SDRAM/SyncFlash Row Address Select signal
SDRAM/SyncFlash Column Address Select signal
SDRAM/SyncFlash Write Enable signal
SDRAM/SyncFlash Clock Enable 0
SDRAM/SyncFlash Clock Enable 1
SDRAM/SyncFlash Clock
SyncFlash Reset
Crystal input (4 MHz to 16 MHz), or a 16 MHz oscillator input when internal oscillator circuit is shut
down.
Crystal output
32 kHz crystal input
32 kHz crystal output
Clock Out signal selected from internal clock signals. Please refer to clock controller for internal
clock selection.
Master Reset—External active low Schmitt trigger input signal. When this signal goes active, all
modules (except the reset module and the clock control module) are reset.
Reset Out—Internal active low output signal from the Watchdog Timer module and is asserted from
the following sources: Power-on reset, External reset (RESET_IN), and Watchdog time-out.
Power On Reset—Internal active high Schmitt trigger input signal. The POR signal is normally
generated by an external RC circuit designed to detect a power-up event.
Test Reset Pin—External active low signal used to asynchronously initialize the JTAG controller.
Serial Output for test instructions and data. Changes on the falling edge of TCK.
Serial Input for test instructions and data. Sampled on the rising edge of TCK.
Table 3. Signal Names and Descriptions (Continued)
MC9328MX1 Advance Information, Rev. 4
Clocks and Resets
JTAG
Function/Notes
Signals and Connections
7