MC9328MX1/D ETC, MC9328MX1/D Datasheet - Page 66

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MC9328MX1/D

Manufacturer Part Number
MC9328MX1/D
Description
i.MX Integrated Portable System Processor
Manufacturer
ETC
Datasheet
Specifications
Figure 50 on page 67 shows basic read operation timing. In a read operation, the sequence starts with a single block
read command (which specifies the start address in the argument field). The response is sent on the SD_CMD lines
as usual. Data transmission from the card starts after the access time delay N
read command. If the system is in multiple block read mode, the card sends a continuous flow of data blocks with
distance N
the stop command.
66
AC
until the card sees a stop transmission command. The data stops two clock cycles after the end bit of
CMD
CMD
CMD
S T
S T
S T
Figure 49. Timing Diagrams at Data Transfer Mode
Host Command
Host Command
Content
Content
Content
Response
MC9328MX1 Advance Information, Rev. 4
CRC
CRC
CRC
Timing response end to next CMD start (data transfer mode)
E Z Z P
E Z
E Z
N
N
N
Command response timing (data transfer mode)
CR
RC
CC
******
******
******
Timing of command sequences (all modes)
cycles
cycles
cycles
P S T
Z S T
Z S T
Host Command
Host Command
Content
Content
Content
Response
AC
, beginning from the last bit of the
CRC E Z Z
CRC E Z Z
CRC E Z Z
Z
Z
Z
Freescale Semiconductor

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