S71WS256NC0BAWE32 SPANSION [SPANSION], S71WS256NC0BAWE32 Datasheet - Page 149
S71WS256NC0BAWE32
Manufacturer Part Number
S71WS256NC0BAWE32
Description
Stacked Multi-Chip Product (MCP)
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S71WS256NC0BAWE32.pdf
(188 pages)
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36 Power Up and Standby Mode Timing Diagrams
36.1
36.2 Standby Mode
September 15, 2005 S71WS-N_01_A4
Power Up
V
MRS#
CS#
Note:
The default mode after power up is Asynchronous mode (4 Page Read and Asynchronous Write).
But this default mode is not 100% guaranteed, so the MRS# setting sequence is highly recom-
mended after power up.
For entry to PAR mode, drive the MRS# pin into V
during standby mode after the MRS# setting has been completed (A4=1, A3=0). If the MRS# pin
is driven into V
sequence.
Power On
CC
V
CC(Min)
After V
A d v a n c e
CC
CS# = V
MRS# = V IH
Initial State
(wait 200µs)
reaches V
IH
Min. 0ns
IH
Min. 0ns
during PAR mode, the device reverts to standby mode without the wake up
CC
(Min.), wait 200 µs with CS# and MRS# high. This puts the device into normal operation.
CS# = UB# = LB# = V
WE# = V IL , MRS# = V IL
Figure 36.2 Standby Mode State Machines
Power Up Mode
I n f o r m a t i o n
S71WS-Nx0 Based MCPs
MRS Setting
200 µs
Min.
Figure 36.1 Power Up Timing
200 µs
IL
CS# = V
MRS# = V IH
Acti v e
IL
IL
, UB# or LB# = V
for over 0.5µs or longer (suspend period)
Normal Operation
IL
MRS Setting
CS# = V IL
WE# = V IL , MRS#=V IL
CS# = V IH
Standby
Mode
MRS# = V
MRS# = V
IH
IL
Mode
PAR
147
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