S71WS256NC0BAWE32 SPANSION [SPANSION], S71WS256NC0BAWE32 Datasheet - Page 94

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S71WS256NC0BAWE32

Manufacturer Part Number
S71WS256NC0BAWE32
Description
Stacked Multi-Chip Product (MCP)
Manufacturer
SPANSION [SPANSION]
Datasheet
92
Legend:
X = Don’t care.
RA = Read Address.
RD = Read Data.
PA = Program Address. Addresses latch on the rising edge of the
AVD# pulse or active edge of CLK, whichever occurs first.
PD = Program Data. Data latches on the rising edge of WE# or CE#
pulse, whichever occurs first.
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. See
11. Total number of cycles in the command sequence is determined
12. Command sequence resets device for next command after write-
Asynchronous Read (6)
Reset (7)
Program
Write to Buffer (11)
Program Buffer to Flash
Write to Buffer Abort Reset (12)
Chip Erase
Sector Erase
Erase/Program Suspend (13)
Erase/Program Resume (14)
Set Configuration Register (18)
Read Configuration Register
CFI Query (15)
See
All values are in hexadecimal.
Shaded cells indicate read cycles.
Address and data bits not specified in table, legend, or notes are
don’t cares (each hex digit implies 4 bits of data).
Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device
to reading array data.
No unlock or command cycles required when bank is reading
array data.
Reset command is required to return to reading array data (or to
the erase-suspend-read mode if previously in Erase Suspend)
when a bank is in the autoselect mode, or if DQ5 goes high
(while the bank is providing status information) or performing
sector lock/unlock.
The system must provide the bank address. See
section for more information.
Data in cycle 5 is 2230 (WS256N) or 2231 (WS128N).
by the number of words written to the write buffer.
to-buffer operation.
Manufacturer ID
Device ID (9)
Indicator Bits (10)
Entry
Program (16)
CFI (16)
Reset
Entry
Program (17)
Read (17)
Exit (17)
Table 10.1
Table 10.9
Command Sequence
(Notes)
for description of bus operations.
for indicator bit values.
1
1
4
6
4
4
6
1
3
6
6
1
1
4
4
1
3
2
1
2
3
4
1
4
[BA]555
Addr
XXX
XXX
XXX
XXX
Table 15.1
555
555
555
555
555
555
555
555
555
555
555
555
555
555
RA
SA
BA
BA
00
First
Autoselect
Data
Data
RD
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
F0
29
B0
30
98
A0
98
90
A d v a n c e
S71WS-Nx0 Based MCPs
Memory Array Commands
Addr
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
XXX
2AA
2AA
2AA
PA
Second
Data
PD
55
55
55
55
55
55
55
55
55
55
55
00
55
55
55
SA = Sector Address. WS256N = A23–A14; WS128N = A22–A14.
BA = Bank Address. WS256N = A23–A20; WS128N = A22–A20.
CR = Configuration Register data bits D15–D0.
WBL = Write Buffer Location. Address must be within the same write
buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
13. System may read and program in non-erasing sectors, or enter
14. Erase Resume command is valid only during the Erase Suspend
15. Command is valid when device is ready to read array data or
16. Requires Entry command sequence prior to execution. Unlock
17. Requires Entry command sequence prior to execution. Secured
18. Requires reset command to configure the Configuration Register.
[BA]555
[BA]555
[BA]555
I n f o r m a t i o n
the autoselect mode, when in the Erase Suspend mode. The
Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
mode, and requires the bank address.
when device is in autoselect mode. Address equals 55h on all
future devices, but 555h for WS256N/128N.
Bypass Reset command is required to return to reading array
data.
Silicon Sector Exit Reset command is required to exit this mode;
device may otherwise be placed in an unknown state.
Addr
555
555
555
555
555
555
555
555
555
555
PA
Bus Cycles (Notes 1–5)
Third
Data
D0
90
90
90
A0
25
F0
80
80
C6
20
88
A0
90
[BA]X00
[BA]X01
[BA]X03
Addr
XXX
555
555
X00
X00
PA
PA
PA
Fourth
Data
0001
227E
Data
WC
CR
CR
PD
AA
AA
PD
00
BA+X0E
S71WS-N_01_A4 September 15, 2005
Addr
2AA
2AA
PA
Fifth
Data
Data
PD
55
55
BA+X0F
Addr
WBL
555
SA
Sixth
Data
2200
PD
10
30

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