LE80538NE0361MES L9LF Intel, LE80538NE0361MES L9LF Datasheet - Page 38
LE80538NE0361MES L9LF
Manufacturer Part Number
LE80538NE0361MES L9LF
Description
MPU 400 RISC 32-Bit 65nm 1.86GHz 479-Pin BGA
Manufacturer
Intel
Datasheet
1.LE80538NE0361MES_L9LF.pdf
(80 pages)
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38
Figure 13. Quick Start/Deep Sleep Timing
®
NOTES:
Celeron
Compatibility
STPCLK#
CPU bus
Signals
BCLK
SLP#
®
T
T
T
T
T
Processor (0.18µ) in BGA2 and Micro-PGA2 Packages
w
v
x
y
z
=
=
=
=
=
T45 (Stop Grant Acknowledge Bus Cycle Completion to Clock Shut Off Delay)
T46 (Setup Time to Input Signal Hold Requirement)
T47 (Deep Sleep PLL Lock Latency)
T48 (PLL lock to STPCLK# Hold Time)
T49 (Input Signal Hold Time)
Changing
Normal
T
stpgnt
w
Quick Start
Datasheet
Running
T
v
Deep Sleep
Frozen
T
x
T
y
Quick Start
Running
T
z
283654-003
Normal
V0010-00
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