LE80538NE0361MES L9LF Intel, LE80538NE0361MES L9LF Datasheet - Page 44
LE80538NE0361MES L9LF
Manufacturer Part Number
LE80538NE0361MES L9LF
Description
MPU 400 RISC 32-Bit 65nm 1.86GHz 479-Pin BGA
Manufacturer
Intel
Datasheet
1.LE80538NE0361MES_L9LF.pdf
(80 pages)
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Mobile Intel
4.3
44
Figure 18. Maximum Acceptable Overshoot/Undershoot Waveform
®
NOTE:
Celeron
2.0V Max
1.9V
1.8V
Vss
-.15V
-.25V
-.35V Min
Non-GTL+ Signal Quality Specifications
Signals driven to the mobile Intel Celeron processor should meet signal quality specifications to
ensure that the processor reads data properly and that incoming signals do not affect the long-term
reliability of the processor. Unlike previous generations of mobile processors, the mobile Intel
Celeron processor uses GTL+ buffers for non-GTL+ signals. The input and output paths of the
buffers have been slowed down to match the requirements for the non-GTL+ signals. The signal
quality specifications for the non-GTL+ signals are identical to the GTL+ signal quality
specifications except that they are relative to V
OVERSHOOT_CHECKER can be used to verify non-GTL+ signal compliance with the signal
overshoot and undershoot tolerance. The tolerances listed in Table 26 are conservative. Signals
that exceed these tolerances may still meet the processor overshoot and undershoot tolerance if the
OVERSHOOT_CHECKER tool says that they pass.
®
The total overshoot/undershoot budget for one clock cycle is fully consumed by the ,
waveforms.
Processor (0.18µ) in BGA2 and Micro-PGA2 Packages
Datasheet
Time dependant
CMOSREF
Time dependant Overshoot
rather than V
V
CCT
REF
.
283654-003
or
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