LE80538NE0361MES L9LF Intel, LE80538NE0361MES L9LF Datasheet - Page 45

• Manufacturer Part Number: LE80538NE0361MES L9LF
• Description: MPU 400 RISC 32-Bit 65nm 1.86GHz 479-Pin BGA
• Manufacturer: Intel

4.3.1
283654-003
Table 26. Non-GTL+ Signal Group Overshoot/Undershoot Tolerance at the Processor Core
NOTES:
PWRGOOD Signal Quality Specifications
The processor requires PWRGOOD to be a clean indication that clocks and the power supplies
(V
remain below V
they come within specification. The signal will then transition monotonically to a high (2.5V)
state. PWRGOOD may not ringback below 2.0V after rising above V
Overshoot Amplitude
2.1V
2.0V
1.9V
1.8V
1. Under no circumstances should the non-GTL+ signal voltage ever exceed 2.1V maximum with respect to
2. Ring-backs below V
3. Ring-backs above ground cannot be subtracted from undershoots. Lesser overshoot does not allocate
4. System designers are encouraged to follow Intel provided non-GTL+ layout guidelines.
5. All values are specified by design characterization, and are not tested.
CC
ground or -2.1V minimum with respect to V
or larger overshoot.
longer or larger undershoot.
, V
CCT
, etc.) are stable and within their specifications. Clean implies that the signal will
Mobile Intel
IL25
and without errors from the time that the power supplies are turned on, until
2
CCT
®
cannot be subtracted from overshoots. Lesser undershoot does not allocate longer
Celeron
Datasheet
Undershoot Amplitude
-0.45V
-0.35V
-0.25V
-0.15V
®
Processor (0.18µ) in BGA2 and Micro-PGA2 Packages
CCT
(i.e., V
CCT
3
- 2.1V) under operating conditions.
Allowed Pulse Duration
0.45 ns
1.5 ns
5.0 ns
17 ns
IH25
.
1, 4, 5
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