LE80538NE0361MES L9LF Intel, LE80538NE0361MES L9LF Datasheet - Page 78
LE80538NE0361MES L9LF
Manufacturer Part Number
LE80538NE0361MES L9LF
Description
MPU 400 RISC 32-Bit 65nm 1.86GHz 479-Pin BGA
Manufacturer
Intel
Datasheet
1.LE80538NE0361MES_L9LF.pdf
(80 pages)
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Mobile Intel
A.3
78
Figure 25. PLL Filter Specifications
Table 41. PLL Filter Inductor Recommendations
®
NOTES:
1. Diagram is not to scale
2. No specification for frequencies beyond fcore.
3. Fpeak, if existent, should be less than 0.05 MHz.
Celeron
x = 20.log[(Vcct-60 mV)/ Vcct]
Recommendation for Mobile Systems
The following LC components are recommended. The tables will be updated as other suitable
components and specifications are identified.
NOTE:
L1
L2
L3
0.2 dB
-34 dB
-28 dB
x dB
0 dB
Inductor
®
Processor (0.18µ) in BGA2 and Micro-PGA2 Packages
DC
Minimum damping resistance is calculated from 0.35 – DCR
L2 DCR
for L3 is not known and is assumed to be 0.15 . There may be other vendors who might provide
parts of equivalent characteristics and the OEMs should consider doing their own testing for selecting
their own vendors.
passband
forbidden
min
TDK MLF2012A4R7KT
Murata LQG21N4R7K10 4.7 H 10% 47 MHz 30 mA 0.7 (+/-
Murata LQG21C4R7N00 4.7 H 30% 35 MHz 30 mA 0.3 max
zone
is 0.4
1 Hz
Part Number
and 0.5
Datasheet
fpeak
respectively, qualifying them for zero required trace resistance. DCR
4.7 H 10% 35 MHz 30 mA 0.56
Value
1 MHz
Tol
forbidden
66 MHz
zone
SRF
high frequency
band
Rated
min
I
. From vendor provided data, L1 and
(1
50%)
fcore
DCR
max)
Min Damping R
0.2 (assumed)
283654-003
needed
0
0
min
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