LE80538NE0361MES L9LF Intel, LE80538NE0361MES L9LF Datasheet - Page 42

• Manufacturer Part Number: LE80538NE0361MES L9LF
• Description: MPU 400 RISC 32-Bit 65nm 1.86GHz 479-Pin BGA
• Manufacturer: Intel

Mobile Intel
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Table 24. GTL+ Signal Group Ringback Specification
Figure 16. Low to High, GTL+ Receiver Ringback Tolerance
®
Celeron
NOTES:
Symbol
1. Specified for the edge rate of 0.3 – 0.8 V/ns. See Figure 16 for the generic waveform.
2. All values determined by design/characterization.
3. Ringback below V
V
V
REF,max
V
REF,min
®
REF,min
Processor (0.18µ) in BGA2 and Micro-PGA2 Packages
V
REF,max
+0.2V
-0.2V
Parameter
Overshoot
Minimum Time at High
Amplitude of Ringback
Final Settling Voltage
Duration of Sequential Ringback
– 200 mV is not authorized during high to low transitions.
V
start
REF,max
+ 200 mV is not authorized during low to high transitions. Ringback above
Datasheet
Min
100
0.5
-200
200
N/A
Time
Unit
mV
ns
mV
mV
ns
V
Figure
Figure 16,
Figure 17
Figure 16,
Figure 17
Figure 16,
Figure 17
Figure 16,
Figure 17
Figure 16,
Figure 17
IL,BCLK
V
IH,BCLK
Clock
Notes
Notes 1, 2
Notes 1, 2
Notes 1, 2, 3
Notes 1, 2
Notes 1, 2
283654-003
V0014-01