W25Q32BVSSIG Winbond Electronics, W25Q32BVSSIG Datasheet - Page 29

• Manufacturer Part Number: W25Q32BVSSIG
• Description: IC SPI FLASH 32MBIT 8SOIC
• Manufacturer: Winbond Electronics

Specifications of W25Q32BVSSIG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 32M (4M x 8)
• Speed: 104MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.2.12 Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except
that data is output on two pins; IO
twice the rate of standard SPI devices. The Fast Read Dual Output instruction is ideal for quickly
downloading code from Flash to RAM upon power-up or for applications that cache code-segments to
RAM for execution.
Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest
possible frequency of F
“dummy” clocks after the 24-bit address as shown in Figure 11. The dummy clocks allow the device's
internal circuits additional time for setting up the initial address. The input data during the dummy clocks is
“don’t care”. However, the IO
clock.
(IO
(IO
(IO
(IO
CLK
CLK
/CS
/CS
DO
DO
DI
DI
0
1
0
1
)
)
)
)
Mode 3
Mode 0
0
31
*
= MSB
32
33
0
High Impedance
Dummy Clocks
34
1
35
Instruction (3Bh)
R
2
Figure 11. Fast Read Dual Output Instruction Sequence Diagram
(see AC Electrical Characteristics). This is accomplished by adding eight
36
0
3
pin should be high-impedance prior to the falling edge of the first data out
37
4
High Impedance
0
38
and IO
5
39
6
*
6
7
40
1
7
Data Out 1
. This allows data to be transferred from the W25Q32BV at
4
5
23
41
*
8
IO
Input to Output
2
3
- 29 -
22
42
0
switches from
9
0
1
21
43
10
24-Bit Address
*
6
7
44
Data Out 2
4
5
45
3
28
2
3
46
2
29
0
1
Publication Release Date: April 01, 2011
47
1
30
*
6
7
48
0
31
Data Out 3
4
5
49
2
3
50
0
1
51
W25Q32BV
*
6
7
52
Data Out 4
4
5
53
2
3
54
Revision F
0
1
55
6
7