M58BW016FB7T3T NUMONYX, M58BW016FB7T3T Datasheet - Page 25

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M58BW016FB7T3T

Manufacturer Part Number
M58BW016FB7T3T
Description
IC FLASH 16MBIT 70NS 80PQFP
Manufacturer
NUMONYX
Datasheet

Specifications of M58BW016FB7T3T

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (512K x 32)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
80-MQFP, 80-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
M58BW016FB7T3TCT
M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB
Table 7.
1. X latencies can be calculated as: (t
2. This feature is available for the M58BW016F version up to the full operative frequency of 56 MHz, and for
3. The M58BW016F version has a maximum operative frequency of 66 MHz, fully factory tested.
4. Y latencies can be calculated as: t
M13-M11
number from 4 to 8, t
calculation).
the M58BW016D version only if the operative frequency is below 45 MHz.
M5-M4
M2-M0
M15
M14
M10
M9
M8
M7
M6
M3
Bit
Burst configuration register
Valid data ready
Valid clock edge
Description
Read select
Y-Latency
Burst length
X-Latency
Burst type
Wrapping
K
is the clock period and t
(4)
(1)
KHQV
AVQV
Value
+ t
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
– t
00
01
10
11
0
1
0
0
0
1
0
1
0
1
0
1
0
1
SYSTEM MARGIN
LLKH
SYSTEM MARGIN
+ t
Synchronous burst read
Asynchronous read (default at power-on)
Reserved (default value)
Reserved (default value)
Reserved
4, 4-1-1-1
5
6
7
8
Reserved
Reserved (default value)
One burst clock cycle (default value)
Two burst clock cycles
R valid Low during valid burst clock edge (default
value)
R valid Low 1 data cycle before valid burst clock edge
Interleaved (default value)
Sequential
Falling burst clock edge (default value)
Rising burst clock edge
Reserved (default value)
Reserved
Reserved
Reserved
Wrap (default value)
No wrap
Reserved (default value)
4 double-words
8 double-words
Reserved
Reserved
Reserved
Reserved
Continuous
(3)
(3)
(3)
(3)
QVKH
, 5-1-1-1, 5-2-2-2
, 6-1-1-1, 6-2-2-2
, 7-1-1-1, 7-2-2-2
, 8-1-1-1, 8-2-2-2
) + t
+ t
(2)
SYSTEM MARGIN
QVKH
is the time margin required for the
< Y t
K.
Description
< (X -1) t
K
. (X is an integer
Bus operations
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