EPC8QI100 Altera, EPC8QI100 Datasheet - Page 2

IC CONFIG DEVICE 8MBIT 100-PQFP

EPC8QI100

Manufacturer Part Number
EPC8QI100
Description
IC CONFIG DEVICE 8MBIT 100-PQFP
Manufacturer
Altera
Series
EPCr
Datasheet

Specifications of EPC8QI100

Programmable Type
In System Programmable
Memory Size
8Mb
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-MQFP, 100-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1239

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPC8QI100
Manufacturer:
ALTERA
Quantity:
10
Part Number:
EPC8QI100
Manufacturer:
ALTERA
Quantity:
710
Part Number:
EPC8QI100
Quantity:
1 825
Part Number:
EPC8QI100
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EPC8QI100
Manufacturer:
ALTERA
0
Part Number:
EPC8QI100
Manufacturer:
ALTERA
Quantity:
20 000
Part Number:
EPC8QI100N
Manufacturer:
ALTERA
Quantity:
1 500
Part Number:
EPC8QI100N
Manufacturer:
ALTERA21
Quantity:
444
Part Number:
EPC8QI100N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EPC8QI100N
Manufacturer:
ALTERA
0
1–2
Functional Description
Table 1–1. Altera Configuration Devices
Configuration Handbook (Complete Two-Volume Set)
EPC4
EPC8
EPC16
Device
f
Memory Size
16,777,216
4,194,304
8,388,608
(bits)
For more information about FPGA configuration schemes and advanced features,
refer to the appropriate FPGA family chapter in the
The Altera enhanced configuration device is a single-device, high-speed, advanced
configuration solution for very high-density FPGAs. The core of an enhanced
configuration device is divided into two major blocks: a configuration controller and a
flash memory. The flash memory is used to store configuration data for systems made
up of one or more Altera FPGAs. Unused portions of the flash memory can be used to
store processor code or data that can be accessed via the external flash interface after
FPGA configuration is complete.
configuration devices and the amount of configuration space they hold.
Table 1–2
APEX 1K, APEX 20K, APEX 20KC, APEX 20KE, APEX II, Arria GX, Cyclone,
Cyclo
GX, or Mercury device.
Supports ISP via Jam Standard Test and Programming Language (STAPL)
Supports JTAG boundary scan
nINIT_CONF pin allows private JTAG instruction to start FPGA configuration
Internal pull-up resistor on nINIT_CONF always enabled
User programmable weak internal pull-up resistors on nCS and OE pins
Internal weak pull-up resistors on external flash interface address and control
lines, bus hold on data lines
Standby mode with reduced power consumption
ne
II
Decompression
lists the supported configuration devices required to configure an ACEX 1K,
,
FLEX 10K, FLEX 10KA, FLEX 10KE, Stratix, Stratix GX, Stratix II, Stratix II
On-Chip
Support
Yes
Yes
Yes
Chapter 1: Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet
Support
ISP
Yes
Yes
Yes
Table 1–1
Cascading
Support
No
No
No
summarizes the features of Altera
Reprogrammable
Configuration
© December 2009 Altera Corporation
Yes
Yes
Yes
Handbook.
Functional Description
Voltage (V)
Operating
3.3
3.3
3.3

Related parts for EPC8QI100