SE98ATP,547 NXP Semiconductors, SE98ATP,547 Datasheet
SE98ATP,547
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SE98ATP,147
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SE98ATP,547 Summary of contents
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... SE98A DDR memory module temp sensor, 1 3.6 V Rev. 04 — 25 November 2009 1. General description The NXP Semiconductors SE98A measures temperature from −40 °C and +125 °C with JEDEC Grade B ±1 °C accuracy between +75 °C and +95 °C communicating via the 2 I C-bus/SMBus typically mounted on a Dual In-Line Memory Module (DIMM) measuring the DRAM temperature in accordance with the new JEDEC (JC-42 ...
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... NXP Semiconductors Operating current: 250 μA (typ.) and 400 μA (max.) Programmable hysteresis threshold: 0 °C, 1.5 °C, 3 °C, 6 °C Over/under/critical temperature EVENT output B grade accuracy: ±0.5 °C/±1 °C (typ./max.) → +75 °C to +95 °C ±1 °C/±2 °C (typ./max.) → +40 °C to +125 °C ± ...
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... NXP Semiconductors 5. Block diagram SE98A TEMPERATURE REGISTER CRITICAL ALARM TRIP UPPER ALARM TRIP LOWER ALARM TRIP CAPABILITY MANUFACTURING ID DEVICE/REV ID SMBus TIMEOUT/ALERT CONFIGURATION • HYSTERESIS • SHUT DOWN TEMP SENSOR • LOCK PROTECTION • EVENT OUTPUT ON/OFF • EVENT OUTPUT POLARITY • EVENT OUTPUT STATUS • ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration for TSSOP8 Fig 4. Pin configuration for HXSON8 6.2 Pin description Table 2. Symbol [ SDA SCL EVENT V DD [1] This input is overvoltage tolerant to support software write protection when applied to SPD. SE98A_4 Product data sheet DDR memory module temp sensor, 1 3.6 V ...
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... NXP Semiconductors 7. Functional description 7.1 Serial bus interface The SE98A uses the 2-wire serial bus (I controller. The serial bus consists of a clock (SCL) and data (SDA) signals. The device can operate on either the I Standard-mode is defined to have bus speeds from 100 kHz, I from 400 kHz, and the SMBus is from 10 kHz to 100 kHz ...
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... NXP Semiconductors 7.3 EVENT output condition The EVENT output indicates conditions such as the temperature crossing a predefined boundary. The EVENT modes are very configurable and selected using the configuration register (CONFIG). The interrupt mode or comparator mode is selected using CONFIG[0], using either TCRIT/UPPER/LOWER or TCRIT only temperature bands (CONFIG[2]) as modified by hysteresis (CONFIG[10:9]) ...
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... NXP Semiconductors temperature (°C) critical Upper Boundary Alarm Lower Boundary Alarm EVENT in Comparator mode EVENT in Interrupt mode software interrupt clear EVENT in ‘Critical Temp only’ mode Refer to Table 3 for figure note information. Fig 6. EVENT output condition Table 3. EVENT output condition Figure ...
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... NXP Semiconductors 7.3.2 EVENT thresholds 7.3.2.1 Alarm window The device provides a comparison window with an UPPER trip point and a LOWER trip point, programmed through the Upper Boundary Alarm Trip register (02h), and Lower Boundary Alarm Trip register (03h). The Upper Boundary Alarm Trip register holds the ...
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... NXP Semiconductors 7.3.2.2 Critical trip The T th(crit) modified by hysteresis as programmed in the Configuration register. When the temperature reaches the critical temperature value in this register (and EVENT is enabled), the EVENT output asserts and cannot be de-asserted until the temperature drops below the critical temperature threshold. The EVENT cannot be cleared through the Clear EVENT bit (CEVNT) or SMBus ALERT ...
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... NXP Semiconductors In interrupt mode, EVENT asserts when the temperature crosses the alarm upper boundary. If the EVENT output is cleared and the temperature continues to increase until it crosses the critical temperature threshold, EVENT asserts again. Because the temperature is greater than the critical temperature threshold, a Clear EVENT command does not clear the EVENT output ...
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... NXP Semiconductors 7.5 Power-up default condition After power-on, the SE98A is initialized to the following default condition: • Starts monitoring local sensor • EVENT register is cleared—EVENT output is pulled HIGH by external pull-ups EVENT hysteresis is defaulted to 0 °C • • Command pointer is defaulted to ‘00h’ ...
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... NXP Semiconductors 7.7 SMBus Time-out The SE98A supports the SMBus time-out feature. If the host holds SCL LOW between 25 ms and 35 ms, the SE98A would reset its internal state machine to the bus idle state to prevent the system bus hang-up. This feature is turned on by default. The SMBus time-out is disabled by writing a logic 1 to bit 7 of register 22h ...
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... NXP Semiconductors 7.9 SMBus/I The data registers in this device are selected by the Pointer register. At power-up, the Pointer register is set to ‘00’, the location for the Capability register. The Pointer register latches the last location it was set to. Each data register falls into one of three types of user accessibility: • ...
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... NXP Semiconductors SCL SDA S START device address and write by host SCL D15 D14 D13 D12 SDA by host most significant byte data A = ACK = Acknowledge bit Write bit = Read bit = 1. 2 Fig 9. SMBus/I C-bus write to the Pointer register followed by a write data word ...
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... NXP Semiconductors SCL SDA S START device address and read by host SCL D15 D14 D13 D12 SDA returned most significant byte data A = ACK = Acknowledge bit Not Acknowledge bit Write bit = Read bit = 1. 2 Fig 11. SMBus/I C-bus word read from register with a pre-set pointer 7 ...
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... NXP Semiconductors 8. Register descriptions 8.1 Register overview This section describes all the registers used in the SE98A. The registers are used for latching the temperature reading, storing the low and high temperature limits, configuring, the hysteresis threshold and the ADC, as well as reporting status. The device uses the Pointer register to access these registers ...
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... NXP Semiconductors 8.2 Capability register (00h, 16-bit read-only) Table 6. Capability register (address 00h) bit allocation Bit 15 14 Symbol Reset 0 0 Access R R Bit 7 6 Symbol RFU[1:0] Reset 0 0 Access R R Table 7. Bit 15 SE98A_4 Product data sheet DDR memory module temp sensor, 1 3.6 V ...
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... NXP Semiconductors 8.3 Configuration register (01h, 16-bit read/write) Table 8. Configuration register (address 01h) bit allocation Bit 15 14 Symbol Default 0 0 Access R R Bit 7 6 Symbol CTLB AWLB Default 0 0 Access R/W R/W Table 9. Bit Symbol 15:11 RFU 10:9 HEN 8 SHMD SE98A_4 Product data sheet DDR memory module temp sensor, 1 ...
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... NXP Semiconductors Table 9. Bit Symbol 7 CTLB 6 AWLB 5 CEVNT 4 ESTAT 3 EOCTL 2 CVO SE98A_4 Product data sheet DDR memory module temp sensor, 1 3.6 V Configuration register (address 01h) bit description Description Critical Trip Lock bit. 0 — Critical Alarm Trip register is not locked and can be altered (default). ...
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... NXP Semiconductors Table 9. Bit Symbol EMD Table 10. Hysteresis enable Action Below Alarm Window bit (bit 13) Temperature Threshold slope temperature − T sets falling T trip(l) clears rising T trip(l) critical alarm upper alarm lower alarm Above Critical Trip bit 15 = ACT bit) Above Alarm Window ...
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... NXP Semiconductors 8.4 Temperature format The 16-bit value used in the following Trip Point Set and Temperature Read-Back registers is 2’s complement with the Least Significant Bit (LSB) equal to 0.0625 °C. For example: A value of 019Ch will represent 25.75 °C • A value of 07C0h will represent 124 °C • ...
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... NXP Semiconductors 8.5 Temperature Trip Point registers 8.5.1 Upper Boundary Alarm Trip register (16-bit read/write) The value is the upper threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 °C. ‘RFU’ bits will always report zero. Interrupts will respond to the presently programmed boundary values ...
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... NXP Semiconductors 8.5.2 Lower Boundary Alarm Trip register (16-bit read/write) The value is the lower threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 °C. RFU bits will always report zero. Interrupts will respond to the presently programmed boundary values. If boundary values are being altered in-system advised to turn off interrupts until a known state can be obtained to avoid superfluous interrupt activity ...
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... NXP Semiconductors 8.6 Temperature register (16-bit read-only) Table 18. Bit Symbol Reset Access Bit Symbol Reset Access Table 19. Bit 11:1 0 SE98A_4 Product data sheet DDR memory module temp sensor, 1 3.6 V Temperature register bit allocation ACT AAW BAW SIGN TEMP[6: Temperature register bit description ...
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... NXP Semiconductors 8.7 Manufacturer’s ID register (16-bit read-only) The manufacture’s ID matches that assigned to NXP Semiconductors PCI-SIG (1131h), and is intended for use to identify the manufacturer of the device. Table 20. Bit Symbol Reset Access Bit Symbol Reset Access 8.8 Device ID register The device ID and device revision are A1h and 02h, respectively. ...
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... NXP Semiconductors 8.9 SMBus register Table 22. Bit Symbol Reset Access Bit Symbol Reset Access Table 23. Bit 15:8 7 6:1 0 SE98A_4 Product data sheet DDR memory module temp sensor, 1 3.6 V SMBus Time-out register bit allocation STMOUT R SMBus Time-out register bit description Symbol Description RFU reserved ...
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... NXP Semiconductors 9. Application design-in information In a typical application, the SE98A behaves as a slave device and interfaces to the master (or host) via the SCL and SDA lines. The host monitors the EVENT output pin, which is asserted when the temperature reading exceeds the programmed values in the alarm registers. The A0, A1 and A2 pins are directly connected to the shared SPD’ ...
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... NXP Semiconductors 9.1 SE98A in memory module application Figure 15 SPD. The SE98A is centered in the memory module to provide the function to monitor the temperature of the DRAM. In the event of overheat, the SE98A triggers the EVENT output and the memory controller can throttle the memory bus to slow the DRAM, or the CPU can increase the refresh rate for the DRAM ...
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... NXP Semiconductors I OL(sink)(SDA) I OL(sink)EVENT 10. Limiting values Table 24. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage DD V voltage on any other pin n V voltage on pin sink current sink T maximum junction temperature j(max) T storage temperature stg 11 ...
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... NXP Semiconductors Table 26. SMBus DC characteristics − ° 1 3 +120 DD amb Symbol Parameter V HIGH-level input voltage IH V LOW-level input voltage IL V overvoltage input voltage I(ov) V HIGH-level power-on reset th(POR)H threshold voltage V power-on reset recovery th(rec)POR threshold voltage I LOW-level output sink current on OL(sink)EVENT ...
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... NXP Semiconductors 5 I sd(VDD) (μ 3 −1 − C-bus and temp sensor inactive. Fig 17. Shutdown supply current 30 I OL(sink)EVENT (mA 3 3.0 V 2 −50 − 0 Fig 19. EVENT output current 15 conversion rate (conv/ − Fig 21. Conversion rate SE98A_4 Product data sheet DDR memory module temp sensor, 1 3.6 V 002aad881 3 ...
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... NXP Semiconductors 3 (V) 2.5 2.0 1.5 1.0 − For temp sensor conversion. Fig 23. Average power-on threshold voltage temp error (˚ 150 mV (p-p); 0.1 μF AC coupling capacitor; no decoupling capacitor Fig 25. Temperature error versus power supply noise frequency 3 (μ 3.0 V 2 ...
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... NXP Semiconductors Table 27. SMBus AC characteristics − ° 1 3 +125 DD amb The AC specifications fully meet or exceed SMBus 2.0 specifications, but allow the bus to interface with the I to 400 kHz. Symbol Parameter f SCL clock frequency SCL t HIGH period of the SCL clock HIGH t LOW period of the SCL clock ...
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... NXP Semiconductors t LOW SCL t t HD;STA BUF SDA P S SCL t SU;STO SDA STOP condition S = START condition P = STOP condition Fig 27. AC waveforms SE98A_4 Product data sheet DDR memory module temp sensor HIGH SU;STA t t HD;DAT SU;DAT t W write cycle Rev. 04 — 25 November 2009 ...
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... NXP Semiconductors 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...
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... NXP Semiconductors HWSON8: plastic thermal enhanced very very thin small outline package; no leads; 8 terminals; body 0 terminal 1 index area terminal 1 e index area Dimensions (1) Unit max 0.80 0.05 0.65 0.30 mm nom 0.75 0.02 0.55 0.2 0.25 min 0.70 0.00 0.45 0.18 Note 1 ...
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... NXP Semiconductors HXSON8: plastic thermal enhanced extremely thin small outline package; no leads; 8 terminals; body 0 terminal 1 index area terminal 1 e index area DIMENSIONS (mm are the original dimensions) (1) UNIT max 0.5 0.04 0.3 2.1 mm nom 2.0 min 0.2 1.9 Note 1. Dimension A is including plating thickness. The package footprint is compatible with JEDEC MO229 ...
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... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors temperature MSL: Moisture Sensitivity Level Fig 31. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 14. Abbreviations Table 30. Acronym ADC ARA BIOS CDM CMOS CPU CRWP DDR ...
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... NXP Semiconductors Table 30. Acronym RDIMM SO-DIMM PC POR RWP SMBus SPD 15. Revision history Table 31. Revision history Document ID Release date SE98A_4 20091125 • Modifications: Table 1 “Ordering “SOT1069-1” to “SOT1069-2” • Figure 29: package outline drawing changed from “SOT1069-1” to “SOT1069-2” SE98A_3 20090817 ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Serial bus interface . . . . . . . . . . . . . . . . . . . . . . 5 7.2 Slave address . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.3 EVENT output condition . . . . . . . . . . . . . . . . . . 6 7.3.1 EVENT pin output voltage levels and resistor sizing ...