SE98ATP,547 NXP Semiconductors, SE98ATP,547 Datasheet - Page 5

• Manufacturer Part Number: SE98ATP,547
• Description: IC TEMP SENSOR DDR 8-HWSON
• Manufacturer: NXP Semiconductors

Specifications of SE98ATP,547

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 1.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-WSON (Exposed Pad), 8-HWSON
• Temperature Threshold: Programmable
• Full Temp Accuracy: +/- 1 C
• Digital Output - Bus Interface: 2-Wire, SMBus, I2C
• Digital Output - Number Of Bits: 11
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.7 V
• Description/function: DDR Memory Module Temperature Sensor
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Current: 250 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4731-2; SE98ATP,147

NXP Semiconductors
7. Functional description
SE98A_4
Product data sheet
7.1 Serial bus interface
7.2 Slave address
The SE98A uses the 2-wire serial bus (I
controller. The serial bus consists of a clock (SCL) and data (SDA) signals. The device
can operate on either the I
Standard-mode is defined to have bus speeds from 0 Hz to 100 kHz, I
from 0 Hz to 400 kHz, and the SMBus is from 10 kHz to 100 kHz. The host or bus master
generates the SCL signal, and the SE98A uses the SCL signal to receive or send data on
the SDA line. Data transfer is serial, bidirectional, and is one bit at a time with the Most
Significant Bit (MSB) transferred first, and a complete I
and SDA are open-drain, pull-up resistors must be installed on these pins.
The SE98A uses a 4-bit fixed and 3-bit programmable (A0, A1 and A2) 7-bit slave address
that allows a total of eight devices to coexist on the same bus. The input of each pin is
sampled at the start of each I
LOW internally. The A0 pin is also overvoltage tolerant, supporting 10 V software write
protection when applied to the SPD that shares common address lines.
Fig 5.
Slave address
Rev. 04 — 25 November 2009
2
C-bus Standard/Fast mode or SMBus. The I
2
MSB
C-bus/SMBus access. The A0, A1 and A2 pins are pulled
0
0
fixed
DDR memory module temp sensor, 1.7 V to 3.6 V
slave address
1
2
C-bus/SMBus) to communicate with a host
1
A2
selectable
hardware
A1
LSB
002aab304
A0
2
C-bus data is 1 byte. Since SCL
R/W
X
2
C-bus Fast-mode
© NXP B.V. 2009. All rights reserved.
2
C-bus
SE98A
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