SE98ATP,547 NXP Semiconductors, SE98ATP,547 Datasheet - Page 12

• Manufacturer Part Number: SE98ATP,547
• Description: IC TEMP SENSOR DDR 8-HWSON
• Manufacturer: NXP Semiconductors

Specifications of SE98ATP,547

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 1.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-WSON (Exposed Pad), 8-HWSON
• Temperature Threshold: Programmable
• Full Temp Accuracy: +/- 1 C
• Digital Output - Bus Interface: 2-Wire, SMBus, I2C
• Digital Output - Number Of Bits: 11
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.7 V
• Description/function: DDR Memory Module Temperature Sensor
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Current: 250 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4731-2; SE98ATP,147

NXP Semiconductors
SE98A_4
Product data sheet
Fig 7.
How SE98A responds to SMBus ALERT
SMBus ALERT
host detects
7.7 SMBus Time-out
7.8 SMBus ALERT
START bit
The SE98A supports the SMBus time-out feature. If the host holds SCL LOW between
25 ms and 35 ms, the SE98A would reset its internal state machine to the bus idle state to
prevent the system bus hang-up. This feature is turned on by default. The SMBus time-out
is disabled by writing a logic 1 to bit 7 of register 22h.
Remark: When SMBus time-out is enabled, the I
the SMBus time-out timer, and goes down to only 10 kHz.
The SE98A has no SCL driver, so it cannot hold the SCL line LOW.
Remark: SMBus time-out works over the entire supply range of 1.7 V to 3.6 V unless
shutdown bit (SHMD) is set and turns off the oscillator.
The SE98A supports SMBus ALERT when it is programmed for the Interrupt mode and
when the EVENT polarity bit is set to logic 0. The EVENT pin can be ANDed with other
EVENT or ALERT signals from other slave devices to signal their intention to
communicate with the host controller. When the host detects EVENT or ALERT signal
LOW, it issues an Alert Response Address (ARA) to which a slave device would respond
with its address. When there are multiple slave devices generating an ALERT the SE98A
performs bus arbitration. If it wins the bus, it responds to the ARA and then clears the
EVENT pin.
Remark: Either in comparator mode or when the SE98A crosses the critical temperature,
the host must also read the EVENT status bit and provide remedy to the situation by
bringing the temperature to within the alarm window or below the critical temperature if
that bit is set. Otherwise, the EVENT pin will not get de-asserted.
Remark: In the SE98A, the ARA is set to default ON. However, in the SE98B the ARA will
be set to default OFF since ARA is not anticipated to be used in DDR3 DIMM applications.
S
0
0
master sends a START bit,
ARA and a read command
Alert Response Address
0
1
1
Rev. 04 — 25 November 2009
0
0
read
1
acknowledge
0
DDR memory module temp sensor, 1.7 V to 3.6 V
0
The last bit of slave address
Slave acknowledges and
sends its slave address.
0
is hard coded '0'.
1
device address
2
C-bus minimum bus speed is limited by
1
A2
A1
not acknowledge
A0
0
sends a STOP bit
host NACK and
1
© NXP B.V. 2009. All rights reserved.
002aab330
STOP bit
P
SE98A
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