EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 80

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

ADuC832
INTERRUPT SYSTEM
The ADuC832 provides a total of nine interrupt sources with
two priority levels. The control and configuration of the inter-
rupt system is carried out through three interrupt-related SFRs:
•
•
•
Table 45. IE SFR Bit Designations
Bit
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
IP (INTERRUPT PRIORITY REGISTER )
SFR Address:
Power-On Default Value:
Bit Addressable:
Table 46. IP SFR Bit Designations
Bit
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
IEIP2 (SECONDARY INTERRUPT ENABLE REGISTER)
SFR Address
Power-On Default Value
Bit Addressable
Table 47. IEIP2 SFR Bit Designations
Bit
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
IE—interrupt enable register
IP—interrupt priority register
IEIP2—secondary interrupt enable register
Name
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
Name
Reserved
PADC
PT2
PS
PT1
PX1
PT0
PX0
Name
Reserved
PTI
PPSM
PSI
Reserved
ETI
EPSMI
ESI
Description
Written by user to enable or disable all interrupt sources (1 = enable; 0 = disable)
Written by user to enable or disable ADC interrupt (1 = enable; 0 = disable)
Written by user to enable or disable Timer 2 interrupt (1 = enable; 0 = disable)
Written by user to enable or disable UART serial port interrupt (1 = enable; 0 = disable)
Written by user to enable or disable Timer 1 interrupt (1 = enable; 0 = disable)
Written by user to enable or disable External Interrupt 1 (1 = enable; 0 = disable)
Written by user to enable or disable Timer 0 interrupt (1 = enable; 0 = disable)
Written by user to enable or disable External Interrupt 0 (1 = enable; 0 = disable)
B8H
00H
Yes
Description
Reserved for future use.
Written by user to select ADC interrupt priority (1 = high; 0 = low)
Written by user to select Timer 2 interrupt priority (1 = high; 0 = low)
Written by user to select UART serial port interrupt priority (1 = high; 0 = low)
Written by user to select Timer 1 interrupt priority (1 = high; 0 = low)
Written by user to select External Interrupt 1 priority (1 = high; 0 = low)
Written by user to select Timer 0 interrupt priority (1 = high; 0 = low)
Written by user to select External Interrupt 0 priority (1 = high; 0 = low)
A9H
A0H
No
Description
Reserved for future use
Priority for time interval interrupt
Priority for power supply monitor interrupt
Priority for SPI/I
This bit must contain 0.
Written by user to enable or disable time interval counter interrupt. (1 = enable; 0 = disable)
Written by user to enable or disable power supply monitor interrupt. (1 = enable; 0 = disable)
Written by user to enable or disable SPI or I
2
C interrupt
Rev. A | Page 80 of 92
2
C serial port interrupt. (1 = enable; 0 = disable)
IE (INTERRUPT ENABLE REGISTER)
SFR Address:
Power-On Default Value:
Bit Addressable:
A8H
00H
Yes