EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 9
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EVAL-ADUC832QSZ
Manufacturer Part Number
EVAL-ADUC832QSZ
Description
KIT DEV FOR ADUC832 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Specifications of EVAL-ADUC832QSZ
Contents
Evaluation Board, Cable, Power Supply, Software and Documentation
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADuC832
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
EVAL-ADUC832QS
EVAL-ADUC832QS
EVAL-ADUC832QS
Parameter
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Temperature range: −40°C to +125°C.
ADC linearity is guaranteed during normal MicroConverter core operation.
ADC LSB size = V
Not production tested, but are guaranteed by design and/or characterization data on production release.
Offset error, gain error, offset error match, and gain error match are measured after factory calibration.
Based on external ADC system components, the user may need to execute a system calibration to remove additional external channel errors and achieve these
specifications.
SNR calculation includes distortion and noise components.
Channel-to-channel crosstalk is measured on adjacent channels.
The temperature sensor gives a measure of the die temperature directly; air temperature can be inferred from this result.
unbuffered mode tested with
capacitor chosen for both the V
need to be shorted together for correct operation.
derates with junction temperature as shown in Figure 48 in the ADuC832 Flash/EE Memory Reliability section.
DAC linearity is calculated using:
DAC differential nonlinearity specified on 0 V to V
DAC specification for output impedance in the unbuffered case depends on DAC code.
DAC specifications for I
Measured with V
When using an external reference device, the internal band gap reference input can be bypassed by setting the ADCCON1[6] bit. In this mode, the V
Flash/EE Memory reliability characteristics apply to both the Flash/EE program memory and the Flash/EE data memory.
Endurance is qualified to 100,000 cycles as per JEDEC Std. 22 method A117 and measured at −40°C, +25°C, and +125°C. Typical endurance at 25°C is 700,000 cycles.
Retention lifetime equivalent at junction temperature (T
Power supply current consumption is measured in normal, idle, and power-down modes under the following conditions:
DV
Power Supply Currents Power-Down Mode
Typical Additional Power Supply Currents
Normal mode: RESET = 0.4 V, digital I/O pins = open circuit, Core_CLK changed via the CD bits in PLLCON[2:0], core executing internal software loop.
Idle mode: RESET = 0.4 V, digital I/O pins = open circuit, Core_CLK changed via the CD bits in PLLCON, PCON[0] = 1, core execution suspended in idle mode.
Power-down mode: RESET = 0.4 V, all Port 0 pins = 0.4 V, all other digital I/O and Port 1 pins are open circuit, Core_CLK changed via the CD bits in PLLCON, PCON[1]
Reduced code range of 100 to 4095, 0 V to V
Reduced code range of 100 to 3945, 0 V to V
DAC output load = 10 kΩ and 100 pF.
= 1, core execution suspended in power-down mode, oscillator turned on or off via OSC_PD bit (PLLCON[7]).
DD
DV
AV
DV
PSM Peripheral
ADC
DAC
power supply current increases typically by 3 mA (3 V operation) and 10 mA (5 V operation) during a Flash/EE memory program or erase cycle.
DD
DD
DD
Current
Current
Current
1
REF
REF
/2
4
and C
12
, that is, for internal V
SINK
REF
, voltage output settling time, and digital-to-analog glitch energy depend on external buffer implementation in unbuffered mode. DAC in
pins decoupled with 0.1 μF capacitors to ground. Power-up time for the internal reference is determined by the value of the decoupling
OP270
REF
and C
external buffer, which has a low input leakage current.
REF
pins.
REF
= 2.5 V, 1 LSB = 610 μV and for external V
REF
DD
range.
range.
REF
and 0 V to V
J
) = 55°C as per JEDEC Std. 22 Method A117. Retention lifetime based on an activation energy of 0.6 eV
DD
ranges.
V
80
38
25
50
1.5
150
2
35
DD
Rev. A | Page 9 of 92
= 5 V
V
25
14
1
20
12
DD
REF
= 3 V
= 1 V, 1 LSB = 244 μV.
Unit
μA max
μA typ
μA typ
μA max
μA typ
μA typ
mA typ
μA typ
Test Conditions/Comments
Core_CLK = 2.097 MHz or 16.78 MHz
Oscillator on
Oscillator off
AV
DD
= DV
DD
= 5 V
REF
ADuC832
and C
REF
pins