MC9S08SH4CTJ Freescale Semiconductor, MC9S08SH4CTJ Datasheet - Page 66

IC MCU 8BIT 4K FLASH 20-TSSOP

MC9S08SH4CTJ

Manufacturer Part Number
MC9S08SH4CTJ
Description
IC MCU 8BIT 4K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08SH4CTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
17
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
A/d Bit Size
10 bit
A/d Channels Available
12
Height
1.05 mm
Length
6.6 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
4.5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08SH4CTJ
Quantity:
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Part Number:
MC9S08SH4CTJR
Manufacturer:
FREESCALE
Quantity:
20 000
Chapter 5 Resets, Interrupts, and General System Control
5.7.1
This direct page register includes status and control bits, which are used to configure the IRQ function,
report status, and acknowledge IRQ events.
66
IRQMOD
IRQEDG
IRQPDD
IRQACK
Reset
IRQPE
IRQIE
Field
IRQF
6
5
4
3
2
1
0
W
R
Interrupt Pin Request Status and Control Register (IRQSC)
Interrupt Request (IRQ) Pull Device Disable — This read/write control bit is used to disable the internal pullup
device when the IRQ pin is enabled (IRQPE = 1) allowing for an external device to be used.
0 IRQ pull device enabled if IRQPE = 1.
1 IRQ pull device disabled if IRQPE = 1.
Interrupt Request (IRQ) Edge Select — This read/write control bit is used to select the polarity of edges or
levels on the IRQ pin that cause IRQF to be set. The IRQMOD control bit determines whether the IRQ pin is
sensitive to both edges and levels or only edges. When the IRQ pin is enabled as the IRQ input and is configured
to detect rising edges. When IRQEDG = 1 and the internal pull device is enabled, the pull-up device is
reconfigured as an optional pull-down device.
0 IRQ is falling edge or falling edge/low-level sensitive.
1 IRQ is rising edge or rising edge/high-level sensitive.
IRQ Pin Enable — This read/write control bit enables the IRQ pin function. When this bit is set the IRQ pin can
be used as an interrupt request.
0 IRQ pin function is disabled.
1 IRQ pin function is enabled.
IRQ Flag — This read-only status bit indicates when an interrupt request event has occurred.
0 No IRQ request.
1 IRQ event detected.
IRQ Acknowledge — This write-only bit is used to acknowledge interrupt request events (write 1 to clear IRQF).
Writing 0 has no meaning or effect. Reads always return 0. If edge-and-level detection is selected (IRQMOD = 1),
IRQF cannot be cleared while the IRQ pin remains at its asserted level.
IRQ Interrupt Enable — This read/write control bit determines whether IRQ events generate an interrupt
request.
0 Interrupt request when IRQF set is disabled (use polling).
1 Interrupt requested whenever IRQF = 1.
IRQ Detection Mode — This read/write control bit selects either edge-only detection or edge-and-level
detection. The IRQEDG control bit determines the polarity of edges and levels that are detected as interrupt
request events. See
0 IRQ event on falling edges or rising edges only.
1 IRQ event on falling edges and low levels or on rising edges and high levels.
0
0
7
Figure 5-2. Interrupt Request Status and Control Register (IRQSC)
= Unimplemented or Reserved
IRQPDD
0
6
Section 5.5.2.2, “Edge and Level
Table 5-3. IRQSC Register Field Descriptions
MC9S08SH8 MCU Series Data Sheet, Rev. 3
IRQEDG
0
5
IRQPE
0
4
Description
Sensitivity,” for more details.
IRQF
3
0
IRQACK
0
0
2
Freescale Semiconductor
IRQIE
0
1
IRQMOD
0
0

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