MC9S08SH4CTJ Freescale Semiconductor, MC9S08SH4CTJ Datasheet - Page 70

• Manufacturer Part Number: MC9S08SH4CTJ
• Description: IC MCU 8BIT 4K FLASH 20-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08SH4CTJ

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: S08SH
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 1.05 mm
• Length: 6.6 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 4.5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
Chapter 5 Resets, Interrupts, and General System Control
5.7.5
This high page register contains bits to configure MCU specific features on the MC9S08SH8 devices.
70
This bit can be written only one time after reset. Additional writes are ignored.
COPCLKS
T1CH1PS
T1CH0PS
Reset:
COPW
Field
ACIC
7
6
4
1
0
W
R
COPCLKS
System Options Register 2 (SOPT2)
COP Watchdog Clock Select — This write-once bit selects the clock source of the COP watchdog.
0 Internal 1-kHz clock is source to COP.
1 Bus clock is source to COP.
COP Window — This write-once bit selects the COP operation mode. When set, the 0x55-0xAA write sequence
to the SRS register must occur in the last 25% of the selected period. Any write to the SRS register during the
first 75% of the selected period will reset the MCU.
0 Normal COP operation
1 Window COP operation (only if COPCLKS = 1)
Analog Comparator to Input Capture Enable— This bit connects the output of ACMP to TPM1 input channel 0.
0 ACMP output not connected to TPM1 input channel 0.
1 ACMP output connected to TPM1 input channel 0.
TPM1CH1 Pin Select— This selects the location of the TPM1CH1 pin of the TPM1 module.
0 TPM1CH1 on PTB5.
1 TPM1CH1 on PTC1.
TPM1CH0 Pin Select— This bit selects the location of the TPM1CH0 pin of the TPM1 module.
0 TPM1CH0 on PTA0.
1 TPM1CH0 on PTC0.
0
7
1
= Unimplemented or Reserved
COPW
0
6
1
Figure 5-6. System Options Register 2 (SOPT2)
Table 5-7. SOPT2 Register Field Descriptions
MC9S08SH8 MCU Series Data Sheet, Rev. 3
0
0
5
ACIC
0
4
Description
3
0
0
0
0
2
T1CH1PS
Freescale Semiconductor
0
1
T1CH0PS
0
0