MC9S08SH4CTJ Freescale Semiconductor, MC9S08SH4CTJ Datasheet - Page 68

• Manufacturer Part Number: MC9S08SH4CTJ
• Description: IC MCU 8BIT 4K FLASH 20-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08SH4CTJ

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: S08SH
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 1.05 mm
• Length: 6.6 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 4.5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
Chapter 5 Resets, Interrupts, and General System Control
5.7.3
This high page register contains a single write-only control bit. A serial background command such as
WRITE_BYTE must be used to write to SBDFR. Attempts to write this register from a user program are
ignored. Reads always return 0x00.
68
BDFR is writable only through serial background debug commands, not from user programs.
Reset:
BDFR
Field
Field
ILAD
LVD
3
1
0
W
R
System Background Debug Force Reset Register (SBDFR)
Illegal Address — Reset was caused by an attempt to access either data or an instruction at an unimplemented
memory address.
0 Reset not caused by an illegal address
1 Reset caused by an illegal address
Low Voltage Detect — If the LVDRE bit is set and the supply drops below the LVD trip voltage, an LVD reset will
occur. This bit is also set by POR.
0 Reset not caused by LVD trip or POR.
1 Reset caused by LVD trip or POR.
Background Debug Force Reset — A serial background command such as WRITE_BYTE can be used to allow
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
0
0
7
Figure 5-4. System Background Debug Force Reset Register (SBDFR)
= Unimplemented or Reserved
0
0
6
Table 5-5. SBDFR Register Field Descriptions
Table 5-4. SRS Register Field Descriptions
MC9S08SH8 MCU Series Data Sheet, Rev. 3
0
0
5
0
0
4
Description
Description
3
0
0
0
0
2
Freescale Semiconductor
0
0
1
BDFR
0
0
0
1