MC908AZ60ACFUER Freescale Semiconductor, MC908AZ60ACFUER Datasheet - Page 289

• Manufacturer Part Number: MC908AZ60ACFUER
• Description: IC MCU 60K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60ACFUER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Controller Family/series: HC08
• No. Of I/o's: 52
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC908AZ60ACFUERTR

23.13.3 MSCAN08 Bus Timing Register 0
SJW1 and SJW0 — Synchronization Jump Width
BRP5–BRP0 — Baud Rate Prescaler
Freescale Semiconductor
The synchronization jump width (SJW) defines the maximum number of time quanta (T
by which a bit may be shortened, or lengthened, to achieve resynchronization on data transitions on
the bus (see
These bits determine the time quanta (T
according to
Address:
The CBTR0 register can be written only if the SFTRES bit in the MSCAN08
module control register is set.
BRP5
Reset:
Table
Read:
Table
Write:
0
0
0
0
1
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
:
:
23-7.
23-6).
$0502
SJW1
Bit 7
BRP4
0
0
0
0
0
1
SJW1
:
:
Figure 23-17. Bus Timing Register 0 (CBTR0)
0
0
1
1
Table 23-6. Synchronization Jump Width
SJW0
6
0
BRP3
Table 23-7. Baud Rate Prescaler
0
0
0
0
1
:
:
BRP5
SJW0
5
0
q
BRP2
0
1
0
1
) clock, which is used to build up the individual bit timing,
0
0
0
0
1
:
:
NOTE
BRP4
4
0
BRP1
Synchronization Jump Width
0
0
1
1
1
:
:
BRP3
3
0
BRP0
1 T
2 T
3 T
4 T
0
1
0
1
1
:
:
q
q
q
q
Programmer’s Model of Control Registers
cycle
cycle
cycle
cycle
BRP2
2
0
Prescaler Value (P)
BRP1
1
0
64
1
2
3
4
:
:
BRP0
Bit 0
0
q
) clock cycles
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