MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 207

IC MCU 16BIT EEPROM 4K 112-LQFP

MC812A4CPVE8

Manufacturer Part Number
MC812A4CPVE8
Description
IC MCU 16BIT EEPROM 4K 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC812A4CPVE8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
83
Program Memory Size
4KB (4K x 8)
Program Memory Type
EEPROM
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC812A
Core
HC12
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
91
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Controller Family/series
68HC12
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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16.7.3 Stop Mode
The ATD is inactive in stop mode for reduced power consumption. The STOP instruction aborts any
conversion sequence in progress.
16.8 Interrupt Sources
16.9 General-Purpose Ports
Port AD is an input-only port. When the ATD is enabled, port AD is the analog input port for the ATD.
Setting the ATD power-up bit, ADPU, in ATD control register 2 enables the ATD.
Port AD is available for general-purpose input when the ATD is disabled. Clearing the ADPU bit disables
the ATD.
16.10 Port AD Data Register
Read: Anytime; reads return logic levels on the PAD pins
Write: Has no meaning or effect
PAD7–PAD0 — Port AD Data Input Bits
Freescale Semiconductor
Address: $006F
Conversion sequence complete
The ASCIF flag is set only when a conversion sequence is completed and
ASCIE = 1 or interrupts on the analog-to-digital converter (ATD) module
are enabled.
Reset:
Read:
Write:
PAD7
Bit 7
0
Figure 16-14. Port AD Data Input Register (PORTAD)
Interrupt
Source
= Unimplemented
PAD6
6
0
Table 16-5. ATD Interrupt Sources
MC68HC812A4 Data Sheet, Rev. 7
PAD5
5
0
NOTE
PAD4
ASCIF
Flag
4
0
PAD3
Enable
ASCIE
Local
3
0
PAD2
Mask
CCR
I bit
2
0
PAD1
$FFD2, $FFD3
1
0
Address
Vector
PAD0
Bit 0
0
Interrupt Sources
207

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