MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 56

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Operating Modes and Resource Mapping
5.2.1.1 Normal Expanded Wide Mode
The 16-bit external address bus uses port A for the high byte and port B for the low byte. The 16-bit
external data bus uses port C for the high byte and port D for the low byte.
5.2.1.2 Normal Expanded Narrow Mode
The 16-bit external address bus uses port A for the high byte and port B for the low byte. The 8-bit external
data bus uses port C. In this mode, 16-bit data is presented high byte first, followed by the low byte. The
address is automatically incremented on the second cycle.
5.2.1.3 Normal Single-Chip Mode
There are no external buses in normal single-chip mode. The MCU operates as a stand-alone device and
all program and data resources are on-chip. Port pins can be used for general-purpose I/O (input/output).
5.2.2 Special Operating Modes
Special operating modes are commonly used in factory testing and system development.
5.2.2.1 Special Expanded Wide Mode
This mode is for emulation of normal expanded wide mode and emulation of normal single-chip mode with
a 16-bit bus. The bus-control pins of port E are all configured for their bus-control output functions rather
than general-purpose I/O.
5.2.2.2 Special Expanded Narrow Mode
This mode is for emulation of normal expanded narrow mode. External 16-bit data is handled as two
back-to-back bus cycles, one for the high byte followed by one for the low byte. Internal operations
continue to use full 16-bit data paths.
For development purposes, port D can be made available for visibility of 16-bit internal accesses by
setting the EMD and IVIS control bits.
5.2.2.3 Special Single-Chip Mode
This mode can be used to force the MCU to active BDM mode to allow system debug through the BKGD
pin. There are no external address and data buses in this mode. The MCU operates as a stand-alone
device and all program and data space are on-chip. External port pins can be used for general-purpose
I/O.
5.2.2.4 Special Peripheral Mode
The CPU is not active in this mode. An external master can control on-chip peripherals for testing
purposes. It is not possible to change to or from this mode without going through reset. Background
debugging should not be used while the MCU is in special peripheral mode as internal bus conflicts
between BDM and the external master can cause improper operation of both modes.
5.2.3 Background Debug Mode
Background debug mode (BDM) is an auxiliary operating mode that is used for system development.
BDM is implemented in on-chip hardware and provides a full set of debug operations. Some BDM
MC68HC812A4 Data Sheet, Rev. 7
56
Freescale Semiconductor